Mesa (main): radeonsi: document why VBO descriptors in user SGPRs are beneficial

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Module: Mesa
Branch: main
Commit: defc7c92d90728ec66bea736a18bb8180ab60228
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=defc7c92d90728ec66bea736a18bb8180ab60228

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Jun 16 19:30:52 2021 -0400

radeonsi: document why VBO descriptors in user SGPRs are beneficial

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>

---

 src/gallium/drivers/radeonsi/si_pipe.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 15680db443f..7a82b04f959 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1164,8 +1164,12 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
    unsigned prim_discard_vertex_count_threshold, tmp;
    si_initialize_prim_discard_tunables(sscreen, false, &prim_discard_vertex_count_threshold, &tmp);
    /* Compute-shader-based culling doesn't support VBOs in user SGPRs. */
-   if (prim_discard_vertex_count_threshold == UINT_MAX)
+   if (prim_discard_vertex_count_threshold == UINT_MAX) {
+      /* This decreases CPU overhead if all descriptors are in user SGPRs because we don't
+       * have to allocate and count references for the upload buffer.
+       */
       sscreen->num_vbos_in_user_sgprs = sscreen->info.chip_class >= GFX9 ? 5 : 1;
+   }
 
    /* Determine tessellation ring info. */
    bool double_offchip_buffers = sscreen->info.chip_class >= GFX7 &&