Mesa (staging/21.1): intel/perf: use the right popcount for 64bits

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Jun 30 20:12:55 UTC 2021


Module: Mesa
Branch: staging/21.1
Commit: f1e122758e6b7958822fac89e61966f1f901e4d4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1e122758e6b7958822fac89e61966f1f901e4d4

Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Fri Jun 25 13:54:51 2021 +0300

intel/perf: use the right popcount for 64bits

We're currently using the 32bit version which is dropping half the
bits of the 64bits values.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11607>
(cherry picked from commit 71b7c7b0dc698b052b0dc7875c12b433c790bbaf)

---

 .pick_status.json         |  2 +-
 src/intel/perf/gen_perf.c | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 66056359796..b04b12efc1a 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -463,7 +463,7 @@
         "description": "intel/perf: use the right popcount for 64bits",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/intel/perf/gen_perf.c b/src/intel/perf/gen_perf.c
index eb94c385c48..0d3c9a22e74 100644
--- a/src/intel/perf/gen_perf.c
+++ b/src/intel/perf/gen_perf.c
@@ -375,11 +375,11 @@ compute_topology_builtins(struct gen_perf_config *perf,
 
    for (int i = 0; i < sizeof(devinfo->subslice_masks[i]); i++) {
       perf->sys_vars.n_eu_sub_slices +=
-         __builtin_popcount(devinfo->subslice_masks[i]);
+         util_bitcount(devinfo->subslice_masks[i]);
    }
 
    for (int i = 0; i < sizeof(devinfo->eu_masks); i++)
-      perf->sys_vars.n_eus += __builtin_popcount(devinfo->eu_masks[i]);
+      perf->sys_vars.n_eus += util_bitcount(devinfo->eu_masks[i]);
 
    perf->sys_vars.eu_threads_count = devinfo->num_thread_per_eu;
 
@@ -895,7 +895,7 @@ get_passes_mask(struct gen_perf_config *perf,
          assert(counter_indices[i] < perf->n_counters);
 
          uint32_t idx = counter_indices[i];
-         if (__builtin_popcount(perf->counter_infos[idx].query_mask) != (q + 1))
+         if (util_bitcount64(perf->counter_infos[idx].query_mask) != (q + 1))
             continue;
 
          if (queries_mask & perf->counter_infos[idx].query_mask)
@@ -924,7 +924,7 @@ gen_perf_get_n_passes(struct gen_perf_config *perf,
       }
    }
 
-   return __builtin_popcount(queries_mask);
+   return util_bitcount64(queries_mask);
 }
 
 void
@@ -934,7 +934,7 @@ gen_perf_get_counters_passes(struct gen_perf_config *perf,
                              struct gen_perf_counter_pass *counter_pass)
 {
    uint64_t queries_mask = get_passes_mask(perf, counter_indices, counter_indices_count);
-   ASSERTED uint32_t n_passes = __builtin_popcount(queries_mask);
+   ASSERTED uint32_t n_passes = util_bitcount64(queries_mask);
 
    for (uint32_t i = 0; i < counter_indices_count; i++) {
       assert(counter_indices[i] < perf->n_counters);
@@ -946,7 +946,7 @@ gen_perf_get_counters_passes(struct gen_perf_config *perf,
       counter_pass[i].query = &perf->queries[query_idx];
 
       uint32_t clear_bits = 63 - query_idx;
-      counter_pass[i].pass = __builtin_popcount((queries_mask << clear_bits) >> clear_bits) - 1;
+      counter_pass[i].pass = util_bitcount64((queries_mask << clear_bits) >> clear_bits) - 1;
       assert(counter_pass[i].pass < n_passes);
    }
 }



More information about the mesa-commit mailing list