Mesa (staging/21.1): radeonsi: fix fb_too_small condition

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Module: Mesa
Branch: staging/21.1
Commit: bea0897878e0188b7cc34d33c0ab54a2e160ed4a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bea0897878e0188b7cc34d33c0ab54a2e160ed4a

Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date:   Mon Jun 21 15:11:27 2021 +0200

radeonsi: fix fb_too_small condition

fb->num_layers can be 0 so use util_num_layers(tex) instead.

Fixes: f7c58559f57 ("radeonsi: refine fast clears for small buffers, always use them for large HTILE")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
(cherry picked from commit b72c7c6c5681b38a2c04650c6bc32e12e48d62be)

---

 .pick_status.json                       | 2 +-
 src/gallium/drivers/radeonsi/si_clear.c | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index b04b12efc1a..05e54094921 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -148,7 +148,7 @@
         "description": "radeonsi: fix fb_too_small condition",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "f7c58559f5731790f4e68f1b1cb38c10818efa96"
     },
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index b6003d11921..0bee645f268 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -548,7 +548,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
    struct si_clear_info info[8 * 2 + 1]; /* MRTs * (CMASK + DCC) + ZS */
    unsigned num_clears = 0;
    unsigned clear_types = 0;
-   bool fb_too_small = fb->width * fb->height * fb->layers <= 512 * 512;
+   unsigned num_pixels = fb->width * fb->height;
 
    /* This function is broken in BE, so just disable this path for now */
 #if UTIL_ARCH_BIG_ENDIAN
@@ -602,6 +602,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
        *
        * This helps on both dGPUs and APUs, even small APUs like Mullins.
        */
+      bool fb_too_small = num_pixels * num_layers <= 512 * 512;
       bool too_small = tex->buffer.b.b.nr_samples <= 1 && fb_too_small;
       bool eliminate_needed = false;
       bool fmask_decompress_needed = false;
@@ -791,6 +792,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
       unsigned level = zsbuf->u.tex.level;
       bool update_db_depth_clear = false;
       bool update_db_stencil_clear = false;
+      bool fb_too_small = num_pixels * zs_num_layers <= 512 * 512;
 
       /* Transition from TC-incompatible to TC-compatible HTILE if requested. */
       if (zstex->enable_tc_compatible_htile_next_clear) {