Mesa (master): intel/mi_builder: Use AddCSMMIOStartOffset for LRI

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Module: Mesa
Branch: master
Commit: 2c02740a8cba51c500ff60695bcca840c85b5f32
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c02740a8cba51c500ff60695bcca840c85b5f32

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Sat Mar  6 14:52:52 2021 -0600

intel/mi_builder: Use AddCSMMIOStartOffset for LRI

In 06cf838cbdcb03184 we started using the AddCSMMIOStartOffset feature
on Gen11+ but we missed one place.

Fixes: 06cf838cbdcb "intel/mi_builder: Support gen11 command-streamer..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>

---

 src/intel/common/mi_builder.h | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/intel/common/mi_builder.h b/src/intel/common/mi_builder.h
index 59147e4df31..2ed6aab6353 100644
--- a/src/intel/common/mi_builder.h
+++ b/src/intel/common/mi_builder.h
@@ -374,13 +374,17 @@ _mi_copy_no_unref(struct mi_builder *b,
          if (dst.type == MI_VALUE_TYPE_REG64) {
             uint32_t *dw = (uint32_t *)__gen_get_batch_dwords(b->user_data,
                                                               GENX(MI_LOAD_REGISTER_IMM_length) + 2);
+            struct mi_reg_num reg = mi_adjust_reg_num(dst.reg);
             mi_builder_pack(b, GENX(MI_LOAD_REGISTER_IMM), dw, lri) {
                lri.DWordLength = GENX(MI_LOAD_REGISTER_IMM_length) + 2 -
                                  GENX(MI_LOAD_REGISTER_IMM_length_bias);
+#if GEN_GEN >= 11
+               lri.AddCSMMIOStartOffset = reg.cs;
+#endif
             }
-            dw[1] = dst.reg;
+            dw[1] = reg.num;
             dw[2] = src.imm;
-            dw[3] = dst.reg + 4;
+            dw[3] = reg.num + 4;
             dw[4] = src.imm >> 32;
          } else {
 #if GEN_GEN >= 8