Mesa (master): freedreno: Extend threaded_resource
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Thu Mar 11 05:04:26 UTC 2021
Module: Mesa
Branch: master
Commit: 1017dc9f6e8f63658668e1b6557c7cf2226b79bf
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1017dc9f6e8f63658668e1b6557c7cf2226b79bf
Author: Rob Clark <robdclark at chromium.org>
Date: Tue Feb 16 14:42:45 2021 -0800
freedreno: Extend threaded_resource
No functional change, just big churny
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 2 +-
src/gallium/drivers/freedreno/a2xx/fd2_resource.c | 4 +-
src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 4 +-
src/gallium/drivers/freedreno/a3xx/fd3_gmem.c | 4 +-
src/gallium/drivers/freedreno/a3xx/fd3_resource.c | 6 +--
src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 2 +-
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c | 4 +-
src/gallium/drivers/freedreno/a4xx/fd4_resource.c | 2 +-
src/gallium/drivers/freedreno/a4xx/fd4_texture.c | 2 +-
src/gallium/drivers/freedreno/a5xx/fd5_draw.c | 2 +-
src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 2 +-
src/gallium/drivers/freedreno/a5xx/fd5_resource.c | 12 ++---
src/gallium/drivers/freedreno/a5xx/fd5_texture.c | 2 +-
src/gallium/drivers/freedreno/a6xx/fd6_blitter.c | 12 ++---
src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 8 ++--
src/gallium/drivers/freedreno/a6xx/fd6_resource.c | 28 ++++++------
src/gallium/drivers/freedreno/a6xx/fd6_texture.c | 6 +--
.../drivers/freedreno/freedreno_batch_cache.c | 2 +-
src/gallium/drivers/freedreno/freedreno_query.h | 4 ++
src/gallium/drivers/freedreno/freedreno_resource.c | 51 ++++++++++++++--------
src/gallium/drivers/freedreno/freedreno_resource.h | 6 +--
src/gallium/drivers/freedreno/freedreno_state.c | 4 +-
22 files changed, 93 insertions(+), 76 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index e0d1bc49ed0..848b1ec9250 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -145,7 +145,7 @@ emit_texture(struct fd_ringbuffer *ring, struct fd_context *ctx,
OUT_RING(ring, sampler->tex3 | view->tex3);
OUT_RING(ring, sampler->tex4 | view->tex4);
- if (rsc && rsc->base.last_level)
+ if (rsc && rsc->b.b.last_level)
OUT_RELOC(ring, rsc->bo, fd_resource_offset(rsc, 1, 0), view->tex5, 0);
else
OUT_RING(ring, view->tex5);
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_resource.c b/src/gallium/drivers/freedreno/a2xx/fd2_resource.c
index ad5a72a6764..9738228338d 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_resource.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_resource.c
@@ -29,8 +29,8 @@
uint32_t
fd2_setup_slices(struct fd_resource *rsc)
{
- struct pipe_resource *prsc = &rsc->base;
- enum pipe_format format = rsc->base.format;
+ struct pipe_resource *prsc = &rsc->b.b;
+ enum pipe_format format = prsc->format;
uint32_t height0 = util_format_get_nblocksy(format, prsc->height0);
uint32_t level, size = 0;
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index c273b5e55ab..ccd59337249 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -228,7 +228,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
fd3_pipe_sampler_view(tex->textures[i]) :
&dummy_view;
struct fd_resource *rsc = fd_resource(view->base.texture);
- if (rsc && rsc->base.target == PIPE_BUFFER) {
+ if (rsc && rsc->b.b.target == PIPE_BUFFER) {
OUT_RELOC(ring, rsc->bo, view->base.u.buf.offset, 0, 0);
j = 1;
} else {
@@ -326,7 +326,7 @@ fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
*/
if (rsc->stencil && i == 0) {
rsc = rsc->stencil;
- format = fd_gmem_restore_format(rsc->base.format);
+ format = fd_gmem_restore_format(rsc->b.b.format);
}
/* note: PIPE_BUFFER disallowed for surfaces */
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 509f5e3d49f..cb69ca0949b 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -75,7 +75,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
*/
if (rsc->stencil) {
rsc = rsc->stencil;
- pformat = rsc->base.format;
+ pformat = rsc->b.b.format;
if (bases)
bases++;
}
@@ -323,7 +323,7 @@ emit_gmem2mem_surf(struct fd_batch *batch,
if (stencil) {
rsc = rsc->stencil;
- format = rsc->base.format;
+ format = rsc->b.b.format;
}
uint32_t offset = fd_resource_offset(rsc, psurf->u.tex.level,
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_resource.c b/src/gallium/drivers/freedreno/a3xx/fd3_resource.c
index 500b4150c62..96aa34cef57 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_resource.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_resource.c
@@ -28,7 +28,7 @@
static uint32_t
setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
{
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
uint32_t level, size = 0;
uint32_t width0 = prsc->width0;
@@ -77,7 +77,7 @@ fd3_setup_slices(struct fd_resource *rsc)
{
uint32_t alignment;
- switch (rsc->base.target) {
+ switch (rsc->b.b.target) {
case PIPE_TEXTURE_3D:
case PIPE_TEXTURE_1D_ARRAY:
case PIPE_TEXTURE_2D_ARRAY:
@@ -88,7 +88,7 @@ fd3_setup_slices(struct fd_resource *rsc)
break;
}
- return setup_slices(rsc, alignment, rsc->base.format);
+ return setup_slices(rsc, alignment, rsc->b.b.format);
}
static bool
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index a1fd2b958fd..fbad703b14d 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -313,7 +313,7 @@ fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, unsigned nr_bufs,
*/
if (rsc->stencil && (i == 0)) {
rsc = rsc->stencil;
- format = fd_gmem_restore_format(rsc->base.format);
+ format = fd_gmem_restore_format(rsc->b.b.format);
}
/* note: PIPE_BUFFER disallowed for surfaces */
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index de6f5c6d186..b39fa795c19 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -76,7 +76,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
*/
if (rsc->stencil) {
rsc = rsc->stencil;
- pformat = rsc->base.format;
+ pformat = rsc->b.b.format;
if (bases)
bases++;
}
@@ -158,7 +158,7 @@ emit_gmem2mem_surf(struct fd_batch *batch, bool stencil,
if (stencil) {
debug_assert(rsc->stencil);
rsc = rsc->stencil;
- pformat = rsc->base.format;
+ pformat = rsc->b.b.format;
}
offset = fd_resource_offset(rsc, psurf->u.tex.level,
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_resource.c b/src/gallium/drivers/freedreno/a4xx/fd4_resource.c
index 57cd0d5cefb..b5b4c0cd3e0 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_resource.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_resource.c
@@ -30,7 +30,7 @@
uint32_t
fd4_setup_slices(struct fd_resource *rsc)
{
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
enum pipe_format format = prsc->format;
uint32_t level, size = 0;
uint32_t width = prsc->width0;
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
index 15f716ed5d6..cbabff661a5 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
@@ -162,7 +162,7 @@ fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
rsc = rsc->stencil;
- format = rsc->base.format;
+ format = rsc->b.b.format;
}
so->base = *cso;
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
index 0f372b77913..ab384d520dc 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
@@ -170,7 +170,7 @@ fd5_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth)
OUT_PKT4(ring, REG_A5XX_GRAS_SU_CNTL, 1);
OUT_RING(ring, A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(0.0) |
- COND(zsbuf->base.nr_samples > 1, A5XX_GRAS_SU_CNTL_MSAA_ENABLE));
+ COND(zsbuf->b.b.nr_samples > 1, A5XX_GRAS_SU_CNTL_MSAA_ENABLE));
OUT_PKT4(ring, REG_A5XX_GRAS_CNTL, 1);
OUT_RING(ring, 0x00000000);
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index fe93ba4c907..da6196ac481 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -481,7 +481,7 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base,
// might be required for doing depth/stencil in bypass mode?
struct fdl_slice *slice = fd_resource_slice(rsc, 0);
enum a5xx_color_fmt format =
- fd5_pipe2color(fd_gmem_restore_format(rsc->base.format));
+ fd5_pipe2color(fd_gmem_restore_format(rsc->b.b.format));
OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_resource.c b/src/gallium/drivers/freedreno/a5xx/fd5_resource.c
index 52bb1a6ad85..c164a75f3e4 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_resource.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_resource.c
@@ -29,14 +29,14 @@
static void
setup_lrz(struct fd_resource *rsc)
{
- struct fd_screen *screen = fd_screen(rsc->base.screen);
+ struct fd_screen *screen = fd_screen(rsc->b.b.screen);
const uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
- unsigned lrz_pitch = align(DIV_ROUND_UP(rsc->base.width0, 8), 64);
- unsigned lrz_height = DIV_ROUND_UP(rsc->base.height0, 8);
+ unsigned lrz_pitch = align(DIV_ROUND_UP(rsc->b.b.width0, 8), 64);
+ unsigned lrz_height = DIV_ROUND_UP(rsc->b.b.height0, 8);
/* LRZ buffer is super-sampled: */
- switch (rsc->base.nr_samples) {
+ switch (rsc->b.b.nr_samples) {
case 4:
lrz_pitch *= 2;
FALLTHROUGH;
@@ -57,9 +57,9 @@ setup_lrz(struct fd_resource *rsc)
uint32_t
fd5_setup_slices(struct fd_resource *rsc)
{
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
- if (FD_DBG(LRZ) && has_depth(rsc->base.format))
+ if (FD_DBG(LRZ) && has_depth(rsc->b.b.format))
setup_lrz(rsc);
fdl5_layout(&rsc->layout, prsc->format, fd_resource_nr_samples(prsc),
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
index d1e15e0c1cb..6279038a06c 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
@@ -146,7 +146,7 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
rsc = rsc->stencil;
- format = rsc->base.format;
+ format = rsc->b.b.format;
}
so->base = *cso;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index e31a1618c23..e3012fab3cc 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -580,14 +580,14 @@ emit_blit_src(struct fd_ringbuffer *ring, const struct pipe_blit_info *info, uns
uint32_t pitch = fd_resource_pitch(src, info->src.level);
bool subwc_enabled = fd_resource_ubwc_enabled(src, info->src.level);
unsigned soff = fd_resource_offset(src, info->src.level, layer);
- uint32_t width = u_minify(src->base.width0, info->src.level) * nr_samples;
- uint32_t height = u_minify(src->base.height0, info->src.level);
+ uint32_t width = u_minify(src->b.b.width0, info->src.level) * nr_samples;
+ uint32_t height = u_minify(src->b.b.height0, info->src.level);
uint32_t filter = 0;
if (info->filter == PIPE_TEX_FILTER_LINEAR)
filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
- enum a3xx_msaa_samples samples = fd_msaa_samples(src->base.nr_samples);
+ enum a3xx_msaa_samples samples = fd_msaa_samples(src->b.b.nr_samples);
if (sfmt == FMT6_10_10_10_2_UNORM_DEST)
sfmt = FMT6_10_10_10_2_UNORM;
@@ -639,7 +639,7 @@ emit_blit_texture(struct fd_context *ctx,
dst = fd_resource(info->dst.resource);
- uint32_t nr_samples = fd_resource_nr_samples(&dst->base);
+ uint32_t nr_samples = fd_resource_nr_samples(&dst->b.b);
sx1 = sbox->x * nr_samples;
sy1 = sbox->y;
@@ -983,8 +983,8 @@ handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
blit.mask = PIPE_MASK_R;
blit.src.format = PIPE_FORMAT_R8_UINT;
blit.dst.format = PIPE_FORMAT_R8_UINT;
- blit.src.resource = &src->stencil->base;
- blit.dst.resource = &dst->stencil->base;
+ blit.src.resource = &src->stencil->b.b;
+ blit.dst.resource = &dst->stencil->b.b;
do_rewritten_blit(ctx, &blit);
}
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index a7bb561b13b..2a6966e6e84 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -849,7 +849,7 @@ emit_blit(struct fd_batch *batch,
/* separate stencil case: */
if (stencil) {
rsc = rsc->stencil;
- pfmt = rsc->base.format;
+ pfmt = rsc->b.b.format;
}
offset = fd_resource_offset(rsc, psurf->u.tex.level,
@@ -863,8 +863,8 @@ emit_blit(struct fd_batch *batch,
uint32_t size = fd_resource_slice(rsc, psurf->u.tex.level)->size0;
enum a3xx_color_swap swap = fd6_resource_swap(rsc, pfmt);
enum a3xx_msaa_samples samples =
- fd_msaa_samples(rsc->base.nr_samples);
- uint32_t tile_mode = fd_resource_tile_mode(&rsc->base, psurf->u.tex.level);
+ fd_msaa_samples(rsc->b.b.nr_samples);
+ uint32_t tile_mode = fd_resource_tile_mode(&rsc->b.b, psurf->u.tex.level);
OUT_REG(ring,
A6XX_RB_BLIT_DST_INFO(.tile_mode = tile_mode, .samples = samples,
@@ -1362,7 +1362,7 @@ emit_sysmem_clears(struct fd_batch *batch, struct fd_ringbuffer *ring)
const bool has_depth = pfb->zsbuf;
struct pipe_resource *separate_stencil =
has_depth && fd_resource(pfb->zsbuf->texture)->stencil ?
- &fd_resource(pfb->zsbuf->texture)->stencil->base : NULL;
+ &fd_resource(pfb->zsbuf->texture)->stencil->b.b : NULL;
if ((has_depth && (buffers & PIPE_CLEAR_DEPTH)) ||
(!separate_stencil && (buffers & PIPE_CLEAR_STENCIL))) {
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
index 50549044867..26157fd2bf6 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
@@ -116,11 +116,11 @@ fd6_validate_format(struct fd_context *ctx, struct fd_resource *rsc,
if (!rsc->layout.ubwc)
return;
- if (ok_ubwc_format(rsc->base.screen, format))
+ if (ok_ubwc_format(rsc->b.b.screen, format))
return;
perf_debug_ctx(ctx, "%"PRSC_FMT": demoted to uncompressed due to use as %s",
- PRSC_ARGS(&rsc->base), util_format_short_name(format));
+ PRSC_ARGS(&rsc->b.b), util_format_short_name(format));
fd_resource_uncompress(ctx, rsc);
}
@@ -128,14 +128,14 @@ fd6_validate_format(struct fd_context *ctx, struct fd_resource *rsc,
static void
setup_lrz(struct fd_resource *rsc)
{
- struct fd_screen *screen = fd_screen(rsc->base.screen);
+ struct fd_screen *screen = fd_screen(rsc->b.b.screen);
const uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
- unsigned width0 = rsc->base.width0;
- unsigned height0 = rsc->base.height0;
+ unsigned width0 = rsc->b.b.width0;
+ unsigned height0 = rsc->b.b.height0;
/* LRZ buffer is super-sampled: */
- switch (rsc->base.nr_samples) {
+ switch (rsc->b.b.nr_samples) {
case 4:
width0 *= 2;
FALLTHROUGH;
@@ -157,12 +157,12 @@ setup_lrz(struct fd_resource *rsc)
static uint32_t
fd6_setup_slices(struct fd_resource *rsc)
{
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
- if (!FD_DBG(NOLRZ) && has_depth(rsc->base.format))
+ if (!FD_DBG(NOLRZ) && has_depth(rsc->b.b.format))
setup_lrz(rsc);
- if (rsc->layout.ubwc && !ok_ubwc_format(rsc->base.screen, rsc->base.format))
+ if (rsc->layout.ubwc && !ok_ubwc_format(rsc->b.b.screen, rsc->b.b.format))
rsc->layout.ubwc = false;
fdl6_layout(&rsc->layout, prsc->format, fd_resource_nr_samples(prsc),
@@ -177,7 +177,7 @@ fd6_setup_slices(struct fd_resource *rsc)
static int
fill_ubwc_buffer_sizes(struct fd_resource *rsc)
{
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
struct fdl_explicit_layout explicit = {
.offset = rsc->layout.slices[0].offset,
.pitch = rsc->layout.pitch0,
@@ -207,15 +207,15 @@ fd6_layout_resource_for_modifier(struct fd_resource *rsc, uint64_t modifier)
case DRM_FORMAT_MOD_QCOM_COMPRESSED:
return fill_ubwc_buffer_sizes(rsc);
case DRM_FORMAT_MOD_LINEAR:
- if (can_do_ubwc(&rsc->base)) {
+ if (can_do_ubwc(&rsc->b.b)) {
perf_debug("%"PRSC_FMT": not UBWC: imported with DRM_FORMAT_MOD_LINEAR!",
- PRSC_ARGS(&rsc->base));
+ PRSC_ARGS(&rsc->b.b));
}
return 0;
case DRM_FORMAT_MOD_INVALID:
- if (can_do_ubwc(&rsc->base)) {
+ if (can_do_ubwc(&rsc->b.b)) {
perf_debug("%"PRSC_FMT": not UBWC: imported with DRM_FORMAT_MOD_INVALID!",
- PRSC_ARGS(&rsc->base));
+ PRSC_ARGS(&rsc->b.b));
}
return 0;
default:
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
index f51d000d6b6..d34c5e05b3d 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
@@ -190,7 +190,7 @@ fd6_sampler_view_update(struct fd_context *ctx, struct fd6_pipe_sampler_view *so
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
rsc = rsc->stencil;
- format = rsc->base.format;
+ format = rsc->b.b.format;
}
so->seqno = ++fd6_context(ctx)->tex_seqno;
@@ -225,8 +225,8 @@ fd6_sampler_view_update(struct fd_context *ctx, struct fd6_pipe_sampler_view *so
ubwc_enabled = fd_resource_ubwc_enabled(rsc, lvl);
- if (rsc->base.format == PIPE_FORMAT_R8_G8B8_420_UNORM) {
- struct fd_resource *next = fd_resource(rsc->base.next);
+ if (rsc->b.b.format == PIPE_FORMAT_R8_G8B8_420_UNORM) {
+ struct fd_resource *next = fd_resource(rsc->b.b.next);
/* In case of biplanar R8_G8B8, the UBWC metadata address in
* dwords 7 and 8, is instead the pointer to the second plane.
diff --git a/src/gallium/drivers/freedreno/freedreno_batch_cache.c b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
index d445b9362c2..b4963768e6d 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch_cache.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
@@ -294,7 +294,7 @@ fd_bc_invalidate_batch(struct fd_batch *batch, bool remove)
void
fd_bc_invalidate_resource(struct fd_resource *rsc, bool destroy)
{
- struct fd_screen *screen = fd_screen(rsc->base.screen);
+ struct fd_screen *screen = fd_screen(rsc->b.b.screen);
struct fd_batch *batch;
fd_screen_lock(screen);
diff --git a/src/gallium/drivers/freedreno/freedreno_query.h b/src/gallium/drivers/freedreno/freedreno_query.h
index c7daa697954..cad4fbbe360 100644
--- a/src/gallium/drivers/freedreno/freedreno_query.h
+++ b/src/gallium/drivers/freedreno/freedreno_query.h
@@ -29,6 +29,8 @@
#include "pipe/p_context.h"
+#include "util/u_threaded_context.h"
+
#include "freedreno_util.h"
struct fd_context;
@@ -45,6 +47,8 @@ struct fd_query_funcs {
};
struct fd_query {
+ struct threaded_query base;
+
const struct fd_query_funcs *funcs;
int type;
unsigned index;
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index f9c8f6bfb2e..b324a1d7493 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -70,7 +70,7 @@ static void
rebind_resource_in_ctx(struct fd_context *ctx, struct fd_resource *rsc)
assert_dt
{
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
if (ctx->rebind_resource)
ctx->rebind_resource(ctx, rsc);
@@ -155,7 +155,7 @@ static void
rebind_resource(struct fd_resource *rsc)
assert_dt
{
- struct fd_screen *screen = fd_screen(rsc->base.screen);
+ struct fd_screen *screen = fd_screen(rsc->b.b.screen);
fd_screen_lock(screen);
fd_resource_lock(rsc);
@@ -171,7 +171,7 @@ rebind_resource(struct fd_resource *rsc)
static inline void
fd_resource_set_bo(struct fd_resource *rsc, struct fd_bo *bo)
{
- struct fd_screen *screen = fd_screen(rsc->base.screen);
+ struct fd_screen *screen = fd_screen(rsc->b.b.screen);
rsc->bo = bo;
rsc->seqno = p_atomic_inc_return(&screen->rsc_seqno);
@@ -187,7 +187,7 @@ __fd_resource_wait(struct fd_context *ctx, struct fd_resource *rsc,
int ret;
perf_time_ctx(ctx, 10000, "%s: a busy \"%"PRSC_FMT"\" BO stalled",
- func, PRSC_ARGS(&rsc->base)) {
+ func, PRSC_ARGS(&rsc->b.b)) {
ret = fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
}
@@ -197,8 +197,8 @@ __fd_resource_wait(struct fd_context *ctx, struct fd_resource *rsc,
static void
realloc_bo(struct fd_resource *rsc, uint32_t size)
{
- struct pipe_resource *prsc = &rsc->base;
- struct fd_screen *screen = fd_screen(rsc->base.screen);
+ struct pipe_resource *prsc = &rsc->b.b;
+ struct fd_screen *screen = fd_screen(rsc->b.b.screen);
uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
DRM_FREEDRENO_GEM_TYPE_KMEM |
COND(prsc->bind & PIPE_BIND_SCANOUT, DRM_FREEDRENO_GEM_SCANOUT);
@@ -261,7 +261,7 @@ fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
assert_dt
{
struct pipe_context *pctx = &ctx->base;
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
bool fallback = false;
if (prsc->next)
@@ -330,8 +330,8 @@ fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
*/
struct fd_resource *shadow = fd_resource(pshadow);
- DBG("shadow: %p (%d, %p) -> %p (%d, %p)", rsc, rsc->base.reference.count, rsc->track,
- shadow, shadow->base.reference.count, shadow->track);
+ DBG("shadow: %p (%d, %p) -> %p (%d, %p)", rsc, rsc->b.b.reference.count, rsc->track,
+ shadow, shadow->b.b.reference.count, shadow->track);
/* TODO valid_buffer_range?? */
swap(rsc->bo, shadow->bo);
@@ -462,7 +462,7 @@ fd_alloc_staging(struct fd_context *ctx, struct fd_resource *rsc,
unsigned level, const struct pipe_box *box)
{
struct pipe_context *pctx = &ctx->base;
- struct pipe_resource tmpl = rsc->base;
+ struct pipe_resource tmpl = rsc->b.b;
tmpl.width0 = box->width;
tmpl.height0 = box->height;
@@ -539,7 +539,7 @@ static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
struct fd_resource *rsc = fd_resource(ptrans->resource);
if (ptrans->resource->target == PIPE_BUFFER)
- util_range_add(&rsc->base, &rsc->valid_buffer_range,
+ util_range_add(&rsc->b.b, &rsc->valid_buffer_range,
ptrans->box.x + box->x,
ptrans->box.x + box->x + box->width);
}
@@ -611,7 +611,7 @@ fd_resource_transfer_unmap(struct pipe_context *pctx,
fd_bo_cpu_fini(rsc->bo);
}
- util_range_add(&rsc->base, &rsc->valid_buffer_range,
+ util_range_add(&rsc->b.b, &rsc->valid_buffer_range,
ptrans->box.x,
ptrans->box.x + ptrans->box.width);
@@ -703,7 +703,7 @@ resource_transfer_map(struct pipe_context *pctx,
staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
if (staging_rsc) {
- trans->staging_prsc = &staging_rsc->base;
+ trans->staging_prsc = &staging_rsc->b.b;
trans->base.stride = fd_resource_pitch(staging_rsc, 0);
trans->base.layer_stride = fd_resource_layer_stride(staging_rsc, 0);
trans->staging_box = *box;
@@ -791,7 +791,7 @@ resource_transfer_map(struct pipe_context *pctx,
*/
staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
if (staging_rsc) {
- trans->staging_prsc = &staging_rsc->base;
+ trans->staging_prsc = &staging_rsc->b.b;
trans->base.stride = fd_resource_pitch(staging_rsc, 0);
trans->base.layer_stride =
fd_resource_layer_stride(staging_rsc, 0);
@@ -895,6 +895,8 @@ fd_resource_destroy(struct pipe_screen *pscreen,
if (rsc->scanout)
renderonly_scanout_destroy(rsc->scanout, fd_screen(pscreen)->ro);
+ threaded_resource_deinit(prsc);
+
util_range_destroy(&rsc->valid_buffer_range);
simple_mtx_destroy(&rsc->lock);
fd_resource_tracking_reference(&rsc->track, NULL);
@@ -924,6 +926,8 @@ fd_resource_get_handle(struct pipe_screen *pscreen,
{
struct fd_resource *rsc = fd_resource(prsc);
+ rsc->b.is_shared = true;
+
handle->modifier = fd_resource_modifier(rsc);
DBG("%"PRSC_FMT", modifier=%"PRIx64, PRSC_ARGS(prsc), handle->modifier);
@@ -971,7 +975,7 @@ alloc_resource_struct(struct pipe_screen *pscreen, const struct pipe_resource *t
if (!rsc)
return NULL;
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
*prsc = *tmpl;
pipe_reference_init(&prsc->reference, 1);
@@ -1013,10 +1017,15 @@ fd_resource_allocate_and_resolve(struct pipe_screen *pscreen,
if (!rsc)
return NULL;
- prsc = &rsc->base;
+ prsc = &rsc->b.b;
DBG("%"PRSC_FMT, PRSC_ARGS(prsc));
+ threaded_resource_init(prsc);
+
+ if (tmpl->bind & PIPE_BIND_SHARED)
+ rsc->b.is_shared = true;
+
fd_resource_layout_init(prsc);
#define LINEAR \
@@ -1149,7 +1158,7 @@ fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
if (!rsc)
return NULL;
- return &rsc->base;
+ return &rsc->b.b;
}
prsc = fd_resource_allocate_and_resolve(pscreen, tmpl, modifiers, count, &size);
@@ -1192,10 +1201,13 @@ fd_resource_from_handle(struct pipe_screen *pscreen,
return NULL;
struct fdl_slice *slice = fd_resource_slice(rsc, 0);
- struct pipe_resource *prsc = &rsc->base;
+ struct pipe_resource *prsc = &rsc->b.b;
DBG("%"PRSC_FMT", modifier=%"PRIx64, PRSC_ARGS(prsc), handle->modifier);
+ threaded_resource_init(prsc);
+ rsc->b.is_shared = true;
+
fd_resource_layout_init(prsc);
struct fd_bo *bo = fd_screen_bo_from_handle(pscreen, handle);
@@ -1320,7 +1332,7 @@ fd_resource_get_stencil(struct pipe_resource *prsc)
{
struct fd_resource *rsc = fd_resource(prsc);
if (rsc->stencil)
- return &rsc->stencil->base;
+ return &rsc->stencil->b.b;
return NULL;
}
@@ -1384,6 +1396,7 @@ fd_resource_from_memobj(struct pipe_screen *pscreen,
if (!prsc)
return NULL;
rsc = fd_resource(prsc);
+ rsc->b.is_shared = true;
/* bo's size has to be large enough, otherwise cleanup resource and fail
* gracefully.
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h
index 774fe8d3967..d8ebde5e76d 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.h
+++ b/src/gallium/drivers/freedreno/freedreno_resource.h
@@ -116,7 +116,7 @@ fd_resource_tracking_reference(struct fd_resource_tracking **ptr,
* A resource (any buffer/texture/image/etc)
*/
struct fd_resource {
- struct pipe_resource base;
+ struct threaded_resource b;
struct fd_bo *bo; /* use fd_resource_set_bo() to write */
enum pipe_format internal_format;
struct fdl_layout layout;
@@ -262,7 +262,7 @@ fd_transfer(struct pipe_transfer *ptrans)
static inline struct fdl_slice *
fd_resource_slice(struct fd_resource *rsc, unsigned level)
{
- assert(level <= rsc->base.last_level);
+ assert(level <= rsc->b.b.last_level);
return &rsc->layout.slices[level];
}
@@ -276,7 +276,7 @@ fd_resource_layer_stride(struct fd_resource *rsc, unsigned level)
static inline uint32_t
fd_resource_pitch(struct fd_resource *rsc, unsigned level)
{
- if (is_a2xx(fd_screen(rsc->base.screen)))
+ if (is_a2xx(fd_screen(rsc->b.b.screen)))
return fdl2_pitch(&rsc->layout, level);
return fdl_pitch(&rsc->layout, level);
diff --git a/src/gallium/drivers/freedreno/freedreno_state.c b/src/gallium/drivers/freedreno/freedreno_state.c
index a8cbb5708f4..83812358945 100644
--- a/src/gallium/drivers/freedreno/freedreno_state.c
+++ b/src/gallium/drivers/freedreno/freedreno_state.c
@@ -530,8 +530,8 @@ fd_create_stream_output_target(struct pipe_context *pctx,
target->offset_buf = pipe_buffer_create(pctx->screen,
PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, sizeof(uint32_t));
- assert(rsc->base.target == PIPE_BUFFER);
- util_range_add(&rsc->base, &rsc->valid_buffer_range,
+ assert(rsc->b.b.target == PIPE_BUFFER);
+ util_range_add(&rsc->b.b, &rsc->valid_buffer_range,
buffer_offset, buffer_offset + buffer_size);
return &target->base;
More information about the mesa-commit
mailing list