Mesa (master): radv: fix potential clears with non renderable images on GFX9+

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Module: Mesa
Branch: master
Commit: 15fc0c351a3f359d2646085afca56c4c58c2684c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=15fc0c351a3f359d2646085afca56c4c58c2684c

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Mar  9 14:05:28 2021 +0100

radv: fix potential clears with non renderable images on GFX9+

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9474>

---

 src/amd/vulkan/radv_meta_clear.c | 4 +---
 src/amd/vulkan/radv_meta_copy.c  | 8 ++++----
 src/amd/vulkan/radv_private.h    | 3 +++
 3 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 4b5ae522846..dfae9b387d7 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -2280,9 +2280,7 @@ void radv_CmdClearColorImage(
 	bool cs;
 
 	cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE ||
-	     image->vk_format == VK_FORMAT_R32G32B32_UINT ||
-	     image->vk_format == VK_FORMAT_R32G32B32_SINT ||
-	     image->vk_format == VK_FORMAT_R32G32B32_SFLOAT;
+	     !radv_image_is_renderable(cmd_buffer->device, image);
 
 	if (cs) {
 		radv_meta_save(&saved_state, cmd_buffer,
diff --git a/src/amd/vulkan/radv_meta_copy.c b/src/amd/vulkan/radv_meta_copy.c
index fc79a734337..7d743c9b130 100644
--- a/src/amd/vulkan/radv_meta_copy.c
+++ b/src/amd/vulkan/radv_meta_copy.c
@@ -104,8 +104,8 @@ blit_surf_for_image_level_layer(struct radv_image *image,
 	};
 }
 
-static bool
-image_is_renderable(struct radv_device *device, struct radv_image *image)
+bool
+radv_image_is_renderable(struct radv_device *device, struct radv_image *image)
 {
 	if (image->vk_format == VK_FORMAT_R32G32B32_UINT ||
 	    image->vk_format == VK_FORMAT_R32G32B32_SINT ||
@@ -137,7 +137,7 @@ copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
 	assert(image->info.samples == 1);
 
 	cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE ||
-	     !image_is_renderable(cmd_buffer->device, image);
+	     !radv_image_is_renderable(cmd_buffer->device, image);
 
 	radv_meta_save(&saved_state, cmd_buffer,
 		       (cs ? RADV_META_SAVE_COMPUTE_PIPELINE :
@@ -473,7 +473,7 @@ copy_image(struct radv_cmd_buffer *cmd_buffer,
 	assert(src_image->info.samples == dst_image->info.samples);
 
 	cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE ||
-	     !image_is_renderable(cmd_buffer->device, dst_image);
+	     !radv_image_is_renderable(cmd_buffer->device, dst_image);
 
 	radv_meta_save(&saved_state, cmd_buffer,
 		       (cs ? RADV_META_SAVE_COMPUTE_PIPELINE :
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index d04bf8b3198..b79787a209b 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -2118,6 +2118,9 @@ radv_get_levelCount(const struct radv_image *image,
 		image->info.levels - range->baseMipLevel : range->levelCount;
 }
 
+bool
+radv_image_is_renderable(struct radv_device *device, struct radv_image *image);
+
 struct radeon_bo_metadata;
 void
 radv_init_metadata(struct radv_device *device,