Mesa (master): aco: fix NSA following writelane
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Wed Mar 17 12:41:34 UTC 2021
Module: Mesa
Branch: master
Commit: 502a0735522355a8a3eddca9ed695279e991fb1e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=502a0735522355a8a3eddca9ed695279e991fb1e
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Wed Mar 10 17:42:52 2021 +0000
aco: fix NSA following writelane
No fossil-db changes on GFX10.
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Fixes: c353895c922 ("aco: use non-sequential addressing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9187>
---
src/amd/compiler/aco_insert_NOPs.cpp | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/src/amd/compiler/aco_insert_NOPs.cpp b/src/amd/compiler/aco_insert_NOPs.cpp
index 15c41a7c6d7..df93cdcb6e2 100644
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -151,6 +151,7 @@ struct NOP_ctx_gfx10 {
bool has_DS = false;
bool has_branch_after_DS = false;
bool has_NSA_MIMG = false;
+ bool has_writelane = false;
std::bitset<128> sgprs_read_by_VMEM;
std::bitset<128> sgprs_read_by_SMEM;
@@ -162,6 +163,7 @@ struct NOP_ctx_gfx10 {
has_DS |= other.has_DS;
has_branch_after_DS |= other.has_branch_after_DS;
has_NSA_MIMG |= other.has_NSA_MIMG;
+ has_writelane |= other.has_writelane;
sgprs_read_by_VMEM |= other.sgprs_read_by_VMEM;
sgprs_read_by_SMEM |= other.sgprs_read_by_SMEM;
}
@@ -176,6 +178,7 @@ struct NOP_ctx_gfx10 {
has_DS == other.has_DS &&
has_branch_after_DS == other.has_branch_after_DS &&
has_NSA_MIMG == other.has_NSA_MIMG &&
+ has_writelane == other.has_writelane &&
sgprs_read_by_VMEM == other.sgprs_read_by_VMEM &&
sgprs_read_by_SMEM == other.sgprs_read_by_SMEM;
}
@@ -756,6 +759,17 @@ void handle_instruction_gfx10(Program *program, Block *cur_block, NOP_ctx_gfx10
Builder(program, &new_instructions).sopp(aco_opcode::s_nop, -1, 0);
}
}
+
+ /* waNsaCannotFollowWritelane
+ * Handles NSA MIMG immediately following a v_writelane_b32.
+ */
+ if (instr->opcode == aco_opcode::v_writelane_b32_e64) {
+ ctx.has_writelane = true;
+ } else if (ctx.has_writelane) {
+ ctx.has_writelane = false;
+ if (instr->isMIMG() && get_mimg_nsa_dwords(instr.get()) > 0)
+ Builder(program, &new_instructions).sopp(aco_opcode::s_nop, -1, 0);
+ }
}
template <typename Ctx>
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