Mesa (master): radeonsi: select the optimal micro tile mode at clear regardless of fast clear

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Module: Mesa
Branch: master
Commit: 88e0e4f70efa51417e7f600dd774b878a553a7ba
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=88e0e4f70efa51417e7f600dd774b878a553a7ba

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Mar 17 14:42:44 2021 -0400

radeonsi: select the optimal micro tile mode at clear regardless of fast clear

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9615>

---

 src/gallium/drivers/radeonsi/si_clear.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 6394eeb277a..e3bb69cef6c 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -415,6 +415,10 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers,
          continue;
       }
 
+      /* We can change the micro tile mode before a full clear. */
+      /* This is only used for MSAA textures when clearing all layers. */
+      si_set_optimal_micro_tile_mode(sctx->screen, tex);
+
       /* only supported on tiled surfaces */
       if (tex->surface.is_linear) {
          continue;
@@ -527,9 +531,6 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers,
          p_atomic_inc(&sctx->screen->compressed_colortex_counter);
       }
 
-      /* We can change the micro tile mode before a full clear. */
-      si_set_optimal_micro_tile_mode(sctx->screen, tex);
-
       *buffers &= ~clear_bit;
 
       /* Chips with DCC constant encoding don't need to set the clear