Mesa (master): zink: force PIPE_SWIZZLE_1 for X channels in samplerviews

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Mar 23 16:05:39 UTC 2021


Module: Mesa
Branch: master
Commit: fc23ddc22a0aca1cd0f8ab340ca8c0c70cf9916e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc23ddc22a0aca1cd0f8ab340ca8c0c70cf9916e

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Sun Dec 13 10:25:37 2020 -0500

zink: force PIPE_SWIZZLE_1 for X channels in samplerviews

this is generic handling for RGBX-type formats

Reviewed-by: Adam Jackson <ajax at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9607>

---

 src/gallium/drivers/zink/zink_context.c | 43 +++++++++++++++++++++++++++++----
 1 file changed, 38 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c
index a0c8dce0345..b8419c48e1c 100644
--- a/src/gallium/drivers/zink/zink_context.c
+++ b/src/gallium/drivers/zink/zink_context.c
@@ -620,6 +620,21 @@ out:
    return buffer_view;
 }
 
+static inline enum pipe_swizzle
+clamp_void_swizzle(const struct util_format_description *desc, enum pipe_swizzle swizzle)
+{
+   switch (swizzle) {
+   case PIPE_SWIZZLE_X:
+   case PIPE_SWIZZLE_Y:
+   case PIPE_SWIZZLE_Z:
+   case PIPE_SWIZZLE_W:
+      return desc->channel[swizzle].type == UTIL_FORMAT_TYPE_VOID ? PIPE_SWIZZLE_1 : swizzle;
+   default:
+      break;
+   }
+   return swizzle;
+}
+
 static struct pipe_sampler_view *
 zink_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *pres,
                          const struct pipe_sampler_view *state)
@@ -641,16 +656,34 @@ zink_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *pres,
       ivci.image = res->obj->image;
       ivci.viewType = image_view_type(state->target);
 
-      ivci.components.r = component_mapping(state->swizzle_r);
-      ivci.components.g = component_mapping(state->swizzle_g);
-      ivci.components.b = component_mapping(state->swizzle_b);
-      ivci.components.a = component_mapping(state->swizzle_a);
+      ivci.components.r = component_mapping(sampler_view->base.swizzle_r);
+      ivci.components.g = component_mapping(sampler_view->base.swizzle_g);
+      ivci.components.b = component_mapping(sampler_view->base.swizzle_b);
+      ivci.components.a = component_mapping(sampler_view->base.swizzle_a);
+
       ivci.subresourceRange.aspectMask = sampler_aspect_from_format(state->format);
+      ivci.format = zink_get_format(screen, state->format);
       /* samplers for stencil aspects of packed formats need to always use stencil swizzle */
       if (ivci.subresourceRange.aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) {
          ivci.components.g = VK_COMPONENT_SWIZZLE_R;
+      } else {
+         /* if we have e.g., R8G8B8X8, then we have to ignore alpha since we're just emulating
+          * these formats
+          */
+         if (ivci.subresourceRange.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT) {
+             const struct util_format_description *desc = util_format_description(state->format);
+             if (util_format_is_rgba8_variant(desc)) {
+                sampler_view->base.swizzle_r = clamp_void_swizzle(desc, sampler_view->base.swizzle_r);
+                sampler_view->base.swizzle_g = clamp_void_swizzle(desc, sampler_view->base.swizzle_g);
+                sampler_view->base.swizzle_b = clamp_void_swizzle(desc, sampler_view->base.swizzle_b);
+                sampler_view->base.swizzle_a = clamp_void_swizzle(desc, sampler_view->base.swizzle_a);
+                ivci.components.r = component_mapping(sampler_view->base.swizzle_r);
+                ivci.components.g = component_mapping(sampler_view->base.swizzle_g);
+                ivci.components.b = component_mapping(sampler_view->base.swizzle_b);
+                ivci.components.a = component_mapping(sampler_view->base.swizzle_a);
+             }
+         }
       }
-      ivci.format = zink_get_format(screen, state->format);
       assert(ivci.format);
 
       ivci.subresourceRange.baseMipLevel = state->u.tex.first_level;



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