Mesa (staging/21.0): i965/gen11: Fix must-be-ones bit positions in 3D_MODE

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Mar 23 21:27:30 UTC 2021


Module: Mesa
Branch: staging/21.0
Commit: f4a9a0c95b4cb6a599bb956f004e2598484ec78d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4a9a0c95b4cb6a599bb956f004e2598484ec78d

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Wed Mar 10 09:26:13 2021 -0800

i965/gen11: Fix must-be-ones bit positions in 3D_MODE

Fixes: f0d29238df3 ("i965/gen11: Emit SLICE_HASH_TABLE when pipes are unbalanced.")
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9505>
(cherry picked from commit b9a7f9314bc1acb64b778f8d9405e0a0e74a6ff2)

---

 .pick_status.json                            | 2 +-
 src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 3fc72264ad8..130c3df06a5 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1840,7 +1840,7 @@
         "description": "i965/gen11: Fix must-be-ones bit positions in 3D_MODE",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "f0d29238df33d66ca4ee1e5f25a1edd9034f632e"
     },
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 77438d6312d..ec2e0449de8 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -144,7 +144,7 @@ brw_upload_gen11_slice_hashing_state(struct brw_context *brw)
     */
    BEGIN_BATCH(2);
    OUT_BATCH(_3DSTATE_3D_MODE  << 16 | (2 - 2));
-   OUT_BATCH(0xffff | SLICE_HASHING_TABLE_ENABLE);
+   OUT_BATCH(0xffff0000 | SLICE_HASHING_TABLE_ENABLE);
    ADVANCE_BATCH();
 }
 



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