Mesa (master): freedreno: Move max-tf-vtx calculation to just the HW that needs it.
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Wed Mar 24 21:46:24 UTC 2021
Module: Mesa
Branch: master
Commit: b02d52459f79a9805033ea789998af744a231704
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b02d52459f79a9805033ea789998af744a231704
Author: Eric Anholt <eric at anholt.net>
Date: Wed Mar 17 16:48:35 2021 -0700
freedreno: Move max-tf-vtx calculation to just the HW that needs it.
a3xx-a4xx use it in in-shader TF code, and all of a3xx-a5xx will need it
shortly for fixing the SW TF queries.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9687>
---
src/gallium/drivers/freedreno/a3xx/fd3_draw.c | 2 ++
src/gallium/drivers/freedreno/a4xx/fd4_draw.c | 2 ++
src/gallium/drivers/freedreno/a5xx/fd5_draw.c | 2 ++
src/gallium/drivers/freedreno/freedreno_context.h | 6 ++++++
src/gallium/drivers/freedreno/ir3/ir3_const.h | 4 ++--
src/gallium/drivers/freedreno/ir3/ir3_gallium.c | 14 +++++---------
src/gallium/drivers/freedreno/ir3/ir3_gallium.h | 2 +-
7 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index 554e4d4cfec..e8298cfabeb 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -132,6 +132,8 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = fd3_emit_get_vp(&emit);
const struct ir3_shader_variant *fp = fd3_emit_get_fp(&emit);
+ ir3_update_max_tf_vtx(ctx, vp);
+
/* do regular pass first: */
if (unlikely(ctx->stats_users > 0)) {
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index 7b7c8730f9f..37b24c1829a 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -121,6 +121,8 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = fd4_emit_get_vp(&emit);
const struct ir3_shader_variant *fp = fd4_emit_get_fp(&emit);
+ ir3_update_max_tf_vtx(ctx, vp);
+
/* do regular pass first: */
if (unlikely(ctx->stats_users > 0)) {
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
index d7ded0b5249..2643427b767 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
@@ -122,6 +122,8 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = fd5_emit_get_vp(&emit);
const struct ir3_shader_variant *fp = fd5_emit_get_fp(&emit);
+ ir3_update_max_tf_vtx(ctx, vp);
+
/* do regular pass first: */
if (unlikely(ctx->stats_users > 0)) {
diff --git a/src/gallium/drivers/freedreno/freedreno_context.h b/src/gallium/drivers/freedreno/freedreno_context.h
index 0f5948f6050..04fb04fcade 100644
--- a/src/gallium/drivers/freedreno/freedreno_context.h
+++ b/src/gallium/drivers/freedreno/freedreno_context.h
@@ -111,6 +111,12 @@ struct fd_streamout_stateobj {
* something more clever.
*/
unsigned offsets[PIPE_MAX_SO_BUFFERS];
+
+ /* Pre-a6xx, the maximum number of vertices that could be recorded to this
+ * set of targets with the current vertex shader. a6xx and newer, hardware
+ * queries are used.
+ */
+ unsigned max_tf_vtx;
};
#define MAX_GLOBAL_BUFFERS 16
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h
index a64323331d9..71cab01f521 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_const.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h
@@ -409,7 +409,6 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v,
}
}
-
static inline void
emit_common_consts(const struct ir3_shader_variant *v, struct fd_ringbuffer *ring,
struct fd_context *ctx, enum pipe_shader_type t)
@@ -464,6 +463,7 @@ ir3_emit_vs_driver_params(const struct ir3_shader_variant *v,
const struct pipe_draw_info *info,
const struct pipe_draw_indirect_info *indirect,
const struct pipe_draw_start_count *draw)
+ assert_dt
{
assert(v->need_driver_params);
@@ -474,7 +474,7 @@ ir3_emit_vs_driver_params(const struct ir3_shader_variant *v,
[IR3_DP_VTXID_BASE] = info->index_size ?
info->index_bias : draw->start,
[IR3_DP_INSTID_BASE] = info->start_instance,
- [IR3_DP_VTXCNT_MAX] = ir3_max_tf_vtx(ctx, v),
+ [IR3_DP_VTXCNT_MAX] = ctx->streamout.max_tf_vtx,
};
if (v->key.ucp_enables) {
struct pipe_clip_state *ucp = &ctx->ucp;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
index d31d6beef1f..e4d667d6c65 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
@@ -557,21 +557,17 @@ ir3_screen_fini(struct pipe_screen *pscreen)
screen->compiler = NULL;
}
-uint32_t
-ir3_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v)
+void
+ir3_update_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v)
{
struct fd_streamout_stateobj *so = &ctx->streamout;
struct ir3_stream_output_info *info = &v->shader->stream_output;
uint32_t maxvtxcnt = 0x7fffffff;
- if (ctx->screen->gpu_id >= 500)
- return 0;
- if (v->binning_pass)
- return 0;
if (v->shader->stream_output.num_outputs == 0)
- return 0;
+ ctx->streamout.max_tf_vtx = 0;
if (so->num_targets == 0)
- return 0;
+ ctx->streamout.max_tf_vtx = 0;
/* offset to write to is:
*
@@ -601,5 +597,5 @@ ir3_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v)
}
}
- return maxvtxcnt;
+ ctx->streamout.max_tf_vtx = maxvtxcnt;
}
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.h b/src/gallium/drivers/freedreno/ir3/ir3_gallium.h
index 8dc87bf7d87..da17bc63f3e 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.h
@@ -77,6 +77,6 @@ ir3_point_sprite(const struct ir3_shader_variant *fs, int i,
}
}
-uint32_t ir3_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v) assert_dt;
+void ir3_update_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v) assert_dt;
#endif /* IR3_GALLIUM_H_ */
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