Mesa (master): radv: break out vertex shader param emission into separate function

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Module: Mesa
Branch: master
Commit: 4e0a3c252742e7b1720728a1c2477e75a0f47744
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e0a3c252742e7b1720728a1c2477e75a0f47744

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Fri Feb  5 13:17:27 2021 -0500

radv: break out vertex shader param emission into separate function

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>

---

 src/amd/vulkan/radv_cmd_buffer.c | 33 +++++++++++++++++++++------------
 1 file changed, 21 insertions(+), 12 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index c321cc0b818..6bac6560331 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -5330,6 +5330,26 @@ radv_cs_emit_indirect_draw_packet(struct radv_cmd_buffer *cmd_buffer,
 	}
 }
 
+static inline void
+radv_emit_userdata_vertex(struct radv_cmd_buffer *cmd_buffer,
+			  const struct radv_draw_info *info,
+			  uint32_t vertex_offset)
+{
+	struct radv_cmd_state *state = &cmd_buffer->state;
+	struct radeon_cmdbuf *cs = cmd_buffer->cs;
+	if (vertex_offset != state->last_vertex_offset || info->first_instance != state->last_first_instance) {
+		radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr,
+				      state->pipeline->graphics.vtx_emit_num);
+
+		radeon_emit(cs, vertex_offset);
+		radeon_emit(cs, info->first_instance);
+		if (state->pipeline->graphics.vtx_emit_num == 3)
+			radeon_emit(cs, 0);
+		state->last_first_instance = info->first_instance;
+		state->last_vertex_offset = vertex_offset;
+	}
+}
+
 ALWAYS_INLINE static void
 radv_emit_draw_packets_indexed(struct radv_cmd_buffer *cmd_buffer,
 			       const struct radv_draw_info *info,
@@ -5606,18 +5626,7 @@ radv_before_draw(struct radv_cmd_buffer *cmd_buffer,
 			radeon_emit(cs, info->instance_count);
 			state->last_num_instances = info->instance_count;
 		}
-		if (vertex_offset != state->last_vertex_offset ||
-		    info->first_instance != state->last_first_instance) {
-			radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr,
-					      state->pipeline->graphics.vtx_emit_num);
-
-			radeon_emit(cs, vertex_offset);
-			radeon_emit(cs, info->first_instance);
-			if (state->pipeline->graphics.vtx_emit_num == 3)
-				radeon_emit(cs, 0);
-			state->last_first_instance = info->first_instance;
-			state->last_vertex_offset = vertex_offset;
-		}
+		radv_emit_userdata_vertex(cmd_buffer, info, vertex_offset);
 	}
 	assert(cmd_buffer->cs->cdw <= cdw_max);