Mesa (master): docs: nops -> NOPs

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Mar 31 16:26:06 UTC 2021


Module: Mesa
Branch: master
Commit: 2988729d1bde609994e7607bdc158b3ec79b0efb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2988729d1bde609994e7607bdc158b3ec79b0efb

Author: Erik Faye-Lund <erik.faye-lund at collabora.com>
Date:   Wed Oct 28 15:07:05 2020 +0100

docs: nops -> NOPs

Acked-by: Matt Turner <mattst88 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9946>

---

 docs/drivers/freedreno/ir3-notes.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/drivers/freedreno/ir3-notes.rst b/docs/drivers/freedreno/ir3-notes.rst
index 288b4689991..2796cad9616 100644
--- a/docs/drivers/freedreno/ir3-notes.rst
+++ b/docs/drivers/freedreno/ir3-notes.rst
@@ -3,7 +3,7 @@ IR3 NOTES
 
 Some notes about ir3, the compiler and machine-specific IR for the shader ISA introduced with adreno a3xx.  The same shader ISA is present, with some small differences, in adreno a4xx.
 
-Compared to the previous generation a2xx ISA (ir2), the a3xx ISA is a "simple" scalar instruction set.  However, the compiler is responsible, in most cases, to schedule the instructions.  The hardware does not try to hide the shader core pipeline stages.  For a common example, a common (cat2) ALU instruction takes four cycles, so a subsequent cat2 instruction which uses the result must have three intervening instructions (or nops).  When operating on vec4's, typically the corresponding scalar instructions for operating on the remaining three components could typically fit.  Although that results in a lot of edge cases where things fall over, like:
+Compared to the previous generation a2xx ISA (ir2), the a3xx ISA is a "simple" scalar instruction set.  However, the compiler is responsible, in most cases, to schedule the instructions.  The hardware does not try to hide the shader core pipeline stages.  For a common example, a common (cat2) ALU instruction takes four cycles, so a subsequent cat2 instruction which uses the result must have three intervening instructions (or NOPs).  When operating on vec4's, typically the corresponding scalar instructions for operating on the remaining three components could typically fit.  Although that results in a lot of edge cases where things fall over, like:
 
 ::
 



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