Mesa (master): intel/eu: SVB writes only happen on Gen6
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Sun May 2 20:26:08 UTC 2021
Module: Mesa
Branch: master
Commit: 2e7656ae2fdd0cd898812b5762138c14149cb6e9
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e7656ae2fdd0cd898812b5762138c14149cb6e9
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Feb 5 08:09:47 2021 -0600
intel/eu: SVB writes only happen on Gen6
It's a Gen6 XFB thing. It's never used for anything else so there's no
point in having a target cache switch.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455>
---
src/intel/compiler/brw_eu_emit.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 138c48ed251..a8577fac632 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -3067,10 +3067,8 @@ brw_svb_write(struct brw_codegen *p,
bool send_commit_msg)
{
const struct intel_device_info *devinfo = p->devinfo;
- const unsigned target_cache =
- (devinfo->ver >= 7 ? GFX7_SFID_DATAPORT_DATA_CACHE :
- devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_RENDER_CACHE :
- BRW_SFID_DATAPORT_WRITE);
+ assert(devinfo->ver == 6);
+ const unsigned target_cache = GFX6_SFID_DATAPORT_RENDER_CACHE;
brw_inst *insn;
gfx6_resolve_implied_move(p, &src0, msg_reg_nr);
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