Mesa (staging/21.1): intel/nir: Set lower txs with non-zero LOD
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Tue May 4 19:09:35 UTC 2021
Module: Mesa
Branch: staging/21.1
Commit: 8f8ce535ef0b61f873892b2add550552af6b75f2
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f8ce535ef0b61f873892b2add550552af6b75f2
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Thu Apr 29 23:05:08 2021 -0500
intel/nir: Set lower txs with non-zero LOD
There's a recently discovered HW bug affecting hardware at least as far
back as Skylake where, if the LOD is out-of-bounds for any SIMD lane,
then garbage may be returned in all SIMD lanes. The easy solution is to
set lower_txs_lod so that we always have a constant LOD of 0 which we
know a priori is always in-bounds. Fortunately, not many shaders
actually use textureSize() with LOD.
Shader-db results on Ice Lake:
total instructions in shared programs: 19948537 -> 19948564 (<.01%)
instructions in affected programs: 3859 -> 3886 (0.70%)
helped: 0
HURT: 7
One of the shaders is in Civilization: Beyond Earth, and the rest are
all in Civilization VI.
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10538>
(cherry picked from commit 05a37e2422080278a668f048cd8bc7a0e4d5d644)
---
.pick_status.json | 2 +-
src/intel/compiler/brw_nir.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/.pick_status.json b/.pick_status.json
index 5184c82dafd..d3b92787beb 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -283,7 +283,7 @@
"description": "intel/nir: Set lower txs with non-zero LOD",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 2f0cc634b92..c48350e5a11 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -827,6 +827,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
.lower_txd_shadow_clamp = true,
.lower_txd_offset_clamp = true,
.lower_tg4_offsets = true,
+ .lower_txs_lod = true, /* Wa_14012320009 */
};
OPT(nir_lower_tex, &tex_options);
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