Mesa (main): Revert "radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2"
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Mon May 10 12:19:08 UTC 2021
Module: Mesa
Branch: main
Commit: 20a0744e2223f632594755ff39a8de0d93ad7b0d
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20a0744e2223f632594755ff39a8de0d93ad7b0d
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Wed Jan 20 16:05:04 2021 +0000
Revert "radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2"
This reverts commit a8a6b9fb2fdcb1bea55707fa0c2b8e96f03c6b5b.
This is no longer necessary now that we fixup the size when creating the
descriptors.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7871>
---
src/amd/compiler/aco_instruction_selection.cpp | 10 ++--------
src/amd/vulkan/radv_shader.c | 1 -
src/amd/vulkan/radv_shader.h | 1 -
3 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index f11217f4467..b8ea27c4cd3 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -4731,18 +4731,12 @@ void visit_load_input(isel_context *ctx, nir_intrinsic_instr *instr)
unsigned fetch_offset = attrib_offset + channel_start * vtx_info->chan_byte_size;
bool expanded = false;
- /* Use MUBUF when possible to avoid possible alignment issues.
- * We don't use MUBUF for multi-component loads because
- * robustBufferAccess2 requires that bounds checking is per-attribute,
- * but MUBUF is per-dword. Other generations get around this by doing
- * bounds checking with the index, instead of the offset like GFX8. */
+ /* use MUBUF when possible to avoid possible alignment issues */
/* TODO: we could use SDWA to unpack 8/16-bit attributes without extra instructions */
bool use_mubuf = (nfmt == V_008F0C_BUF_NUM_FORMAT_FLOAT ||
nfmt == V_008F0C_BUF_NUM_FORMAT_UINT ||
nfmt == V_008F0C_BUF_NUM_FORMAT_SINT) &&
- vtx_info->chan_byte_size == 4 &&
- (fetch_component == 1 || ctx->options->chip_class != GFX8 ||
- !ctx->options->robust_buffer_access2);
+ vtx_info->chan_byte_size == 4;
unsigned fetch_dfmt = V_008F0C_BUF_DATA_FORMAT_INVALID;
if (!use_mubuf) {
fetch_dfmt = get_fetch_data_format(ctx, vtx_info, fetch_offset, attrib_stride, &fetch_component);
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 2d9379a0b09..1ba5875e905 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -1455,7 +1455,6 @@ radv_shader_variant_compile(struct radv_device *device, struct vk_shader_module
options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage);
options.robust_buffer_access = device->robust_buffer_access;
- options.robust_buffer_access2 = device->robust_buffer_access2;
options.disable_optimizations = disable_optimizations;
options.wgp_mode = radv_should_use_wgp_mode(device, stage, info);
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 693f1a4ba53..ba360ffa88c 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -128,7 +128,6 @@ struct radv_nir_compiler_options {
bool explicit_scratch_args;
bool clamp_shadow_reference;
bool robust_buffer_access;
- bool robust_buffer_access2;
bool adjust_frag_coord_z;
bool dump_shader;
bool dump_preoptir;
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