Mesa (main): panfrost: Hide CAP_INT16 behind is_deqp

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Module: Mesa
Branch: main
Commit: 65a00b519935a335e6bc812b981f2973919bb8bf
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=65a00b519935a335e6bc812b981f2973919bb8bf

Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date:   Wed May 12 15:08:19 2021 -0400

panfrost: Hide CAP_INT16 behind is_deqp

The GLSL precision lowering is still buggy (see !10729), no other driver
enables all the CAPs yet. I don't know enough GLSL IR to be the one to
fix this. In the mean time, this is a hotfix to expose the same set of
CAPs that radeonsi does.

By keeping it with is_deqp, we still get CI coverage of int16.

Closes: #4759
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10777>

---

 src/gallium/drivers/panfrost/pan_screen.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/panfrost/pan_screen.c b/src/gallium/drivers/panfrost/pan_screen.c
index b3c12af10ee..6c33bff4ffa 100644
--- a/src/gallium/drivers/panfrost/pan_screen.c
+++ b/src/gallium/drivers/panfrost/pan_screen.c
@@ -390,9 +390,12 @@ panfrost_get_shader_param(struct pipe_screen *screen,
         case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
                 return !is_nofp16;
         case PIPE_SHADER_CAP_FP16_DERIVATIVES:
-        case PIPE_SHADER_CAP_INT16:
         case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
                 return pan_is_bifrost(dev) && !is_nofp16;
+        case PIPE_SHADER_CAP_INT16:
+                /* XXX: Advertise this CAP when a proper fix to lower_precision
+                 * lands. GLSL IR validation failure in glmark2 -bterrain */
+                return pan_is_bifrost(dev) && !is_nofp16 && is_deqp;
 
         case PIPE_SHADER_CAP_INT64_ATOMICS:
         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: