Mesa (main): virgl: implement EXT_multisampled_render_to_texture

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Module: Mesa
Branch: main
Commit: 32f710c09d3b978158c5e4c07e83823080cea48b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=32f710c09d3b978158c5e4c07e83823080cea48b

Author: Italo Nicola <italonicola at collabora.com>
Date:   Wed Apr 28 09:22:02 2021 +0000

virgl: implement EXT_multisampled_render_to_texture

Signed-off-by: Italo Nicola <italonicola at collabora.com>
Reviewed-by: Gert Wollny <gert.wollny at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10500>

---

 src/gallium/drivers/virgl/virgl_context.c |  1 +
 src/gallium/drivers/virgl/virgl_encode.c  | 29 ++++++++++++++++++++++++-----
 src/gallium/drivers/virgl/virgl_screen.c  |  2 ++
 src/virtio/virtio-gpu/virgl_hw.h          |  1 +
 src/virtio/virtio-gpu/virgl_protocol.h    |  5 +++++
 5 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index b27f8643c0e..485a662895e 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -382,6 +382,7 @@ static struct pipe_surface *virgl_create_surface(struct pipe_context *ctx,
    surf->base.u.tex.level = templ->u.tex.level;
    surf->base.u.tex.first_layer = templ->u.tex.first_layer;
    surf->base.u.tex.last_layer = templ->u.tex.last_layer;
+   surf->base.nr_samples = templ->nr_samples;
 
    virgl_encoder_create_surface(vctx, handle, res, &surf->base);
    surf->handle = handle;
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index 6e8476f42f7..00ae949006c 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -781,12 +781,11 @@ int virgl_encoder_draw_vbo(struct virgl_context *ctx,
    return 0;
 }
 
-int virgl_encoder_create_surface(struct virgl_context *ctx,
-                                uint32_t handle,
-                                struct virgl_resource *res,
-                                const struct pipe_surface *templat)
+static int virgl_encoder_create_surface_common(struct virgl_context *ctx,
+                                               uint32_t handle,
+                                               struct virgl_resource *res,
+                                               const struct pipe_surface *templat)
 {
-   virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_SURFACE, VIRGL_OBJ_SURFACE_SIZE));
    virgl_encoder_write_dword(ctx->cbuf, handle);
    virgl_encoder_write_res(ctx, res);
    virgl_encoder_write_dword(ctx->cbuf, pipe_to_virgl_format(templat->format));
@@ -798,6 +797,26 @@ int virgl_encoder_create_surface(struct virgl_context *ctx,
    return 0;
 }
 
+int virgl_encoder_create_surface(struct virgl_context *ctx,
+                                 uint32_t handle,
+                                 struct virgl_resource *res,
+                                 const struct pipe_surface *templat)
+{
+   if (templat->nr_samples > 0) {
+      ASSERTED struct virgl_screen *rs = virgl_screen(ctx->base.screen);
+      assert(rs->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_IMPLICIT_MSAA);
+
+      virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_MSAA_SURFACE, VIRGL_OBJ_MSAA_SURFACE_SIZE));
+      virgl_encoder_create_surface_common(ctx, handle, res, templat);
+      virgl_encoder_write_dword(ctx->cbuf, templat->nr_samples);
+   } else {
+      virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_SURFACE, VIRGL_OBJ_SURFACE_SIZE));
+      virgl_encoder_create_surface_common(ctx, handle, res, templat);
+   }
+
+   return 0;
+}
+
 int virgl_encoder_create_so_target(struct virgl_context *ctx,
                                   uint32_t handle,
                                   struct virgl_resource *res,
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 30fa47a8fef..49b5050db8b 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -339,6 +339,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return vscreen->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_MEMINFO;
    case PIPE_CAP_STRING_MARKER:
        return vscreen->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_STRING_MARKER;
+   case PIPE_CAP_SURFACE_SAMPLE_COUNT:
+       return vscreen->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_IMPLICIT_MSAA;
    default:
       return u_pipe_screen_get_param_defaults(screen, param);
    }
diff --git a/src/virtio/virtio-gpu/virgl_hw.h b/src/virtio/virtio-gpu/virgl_hw.h
index 1286b48a880..35ca6d97f69 100644
--- a/src/virtio/virtio-gpu/virgl_hw.h
+++ b/src/virtio/virtio-gpu/virgl_hw.h
@@ -442,6 +442,7 @@ enum virgl_formats {
 #define VIRGL_CAP_V2_VIDEO_MEMORY         (1 << 2)
 #define VIRGL_CAP_V2_MEMINFO              (1 << 3)
 #define VIRGL_CAP_V2_STRING_MARKER        (1 << 4)
+#define VIRGL_CAP_V2_IMPLICIT_MSAA        (1 << 6)
 
 /* virgl bind flags - these are compatible with mesa 10.5 gallium.
  * but are fixed, no other should be passed to virgl either.
diff --git a/src/virtio/virtio-gpu/virgl_protocol.h b/src/virtio/virtio-gpu/virgl_protocol.h
index a2f81ac7a1e..79d22add1f9 100644
--- a/src/virtio/virtio-gpu/virgl_protocol.h
+++ b/src/virtio/virtio-gpu/virgl_protocol.h
@@ -57,6 +57,7 @@ enum virgl_object_type {
    VIRGL_OBJECT_SURFACE,
    VIRGL_OBJECT_QUERY,
    VIRGL_OBJECT_STREAMOUT_TARGET,
+   VIRGL_OBJECT_MSAA_SURFACE,
    VIRGL_MAX_OBJECTS,
 };
 
@@ -345,6 +346,10 @@ enum virgl_context_cmd {
 #define VIRGL_OBJ_SURFACE_TEXTURE_LEVEL 4
 #define VIRGL_OBJ_SURFACE_TEXTURE_LAYERS 5
 
+/* create surface with implicit MSAA support (for EXT_multisample_render_to_texture) */
+#define VIRGL_OBJ_MSAA_SURFACE_SIZE (VIRGL_OBJ_SURFACE_SIZE + 1)
+#define VIRGL_OBJ_SURFACE_SAMPLE_COUNT 6
+
 /* create streamout target */
 #define VIRGL_OBJ_STREAMOUT_SIZE 4
 #define VIRGL_OBJ_STREAMOUT_HANDLE 1