Mesa (main): radv: enable DCC stores on RDNA2

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Module: Mesa
Branch: main
Commit: 1bbbdfe590dcc00eb6c14233c481e7732d8a4c1e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bbbdfe590dcc00eb6c14233c481e7732d8a4c1e

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Mon Apr 26 13:46:58 2021 +0200

radv: enable DCC stores on RDNA2

It seems this gives 2-3% improvements most of the time. This also
enables DCC for concurrent images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10454>

---

 docs/envvars.rst             | 2 --
 src/amd/vulkan/radv_debug.h  | 1 -
 src/amd/vulkan/radv_device.c | 2 +-
 src/amd/vulkan/radv_image.c  | 9 +--------
 4 files changed, 2 insertions(+), 12 deletions(-)

diff --git a/docs/envvars.rst b/docs/envvars.rst
index 1cd8958821f..d95e79110a8 100644
--- a/docs/envvars.rst
+++ b/docs/envvars.rst
@@ -633,8 +633,6 @@ RADV driver environment variables
       enable wave32 for compute shaders (GFX10+)
    ``dccmsaa``
       enable DCC for MSAA images
-   ``dccstores``
-      enable DCC for storage images (for performance testing on GFX10.3 only)
    ``dfsm``
       enable DFSM
    ``gewave32``
diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h
index 27b821450db..7d01d5b0def 100644
--- a/src/amd/vulkan/radv_debug.h
+++ b/src/amd/vulkan/radv_debug.h
@@ -74,7 +74,6 @@ enum {
    RADV_PERFTEST_DFSM = 1u << 6,
    RADV_PERFTEST_NO_SAM = 1u << 7,
    RADV_PERFTEST_SAM = 1u << 8,
-   RADV_PERFTEST_DCC_STORES = 1u << 9,
 };
 
 bool radv_init_trace(struct radv_device *device);
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 3ea17e862ae..101d3be0dfc 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -816,7 +816,7 @@ static const struct debug_control radv_perftest_options[] = {
    {"cswave32", RADV_PERFTEST_CS_WAVE_32},  {"pswave32", RADV_PERFTEST_PS_WAVE_32},
    {"gewave32", RADV_PERFTEST_GE_WAVE_32},  {"dfsm", RADV_PERFTEST_DFSM},
    {"nosam", RADV_PERFTEST_NO_SAM},         {"sam", RADV_PERFTEST_SAM},
-   {"dccstores", RADV_PERFTEST_DCC_STORES}, {NULL, 0}};
+   {NULL, 0}};
 
 const char *
 radv_get_perftest_option_name(int id)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 039cc84fc6a..01658895817 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -276,14 +276,7 @@ radv_use_dcc_for_image(struct radv_device *device, const struct radv_image *imag
 bool
 radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
 {
-   /*
-    * TODO: Enable on more HW. DIMGREY and VANGOGH need a workaround and
-    * we need more perf analysis.
-    * https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796#note_643853
-    */
-   return device->physical_device->rad_info.chip_class == GFX10 ||
-          (device->physical_device->rad_info.chip_class == GFX10_3 &&
-           (device->instance->perftest_flags & RADV_PERFTEST_DCC_STORES));
+   return device->physical_device->rad_info.chip_class >= GFX10;
 }
 
 /*