Mesa (main): radeonsi: rename stencil_cleared_level_mask -> stencil_cleared_level_mask_once
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Thu Nov 4 18:23:00 UTC 2021
Module: Mesa
Branch: main
Commit: 3baeaac64b9c6053f6ab5e64af7a416c77c9f0dd
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3baeaac64b9c6053f6ab5e64af7a416c77c9f0dd
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Oct 29 13:22:43 2021 -0400
radeonsi: rename stencil_cleared_level_mask -> stencil_cleared_level_mask_once
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
---
src/gallium/drivers/radeonsi/si_clear.c | 10 +++++-----
src/gallium/drivers/radeonsi/si_pipe.h | 2 +-
src/gallium/drivers/radeonsi/si_texture.c | 2 +-
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 0072ef1509f..2985b5d14bd 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -814,7 +814,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
*buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
- zstex->stencil_cleared_level_mask |= BITFIELD_BIT(level);
+ zstex->stencil_cleared_level_mask_once |= BITFIELD_BIT(level);
update_db_depth_clear = true;
update_db_stencil_clear = true;
}
@@ -893,7 +893,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
*buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
- zstex->stencil_cleared_level_mask |= BITFIELD_BIT(level);
+ zstex->stencil_cleared_level_mask_once |= BITFIELD_BIT(level);
update_db_depth_clear = true;
update_db_stencil_clear = true;
}
@@ -930,7 +930,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
htile_stencil_writemask);
clear_types |= SI_CLEAR_TYPE_HTILE;
*buffers &= ~PIPE_CLEAR_STENCIL;
- zstex->stencil_cleared_level_mask |= BITFIELD_BIT(level);
+ zstex->stencil_cleared_level_mask_once |= BITFIELD_BIT(level);
update_db_stencil_clear = true;
}
}
@@ -1023,7 +1023,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
/* Need to disable EXPCLEAR temporarily if clearing
* to a new value. */
- if (!(zstex->stencil_cleared_level_mask & BITFIELD_BIT(level)) ||
+ if (!(zstex->stencil_cleared_level_mask_once & BITFIELD_BIT(level)) ||
zstex->stencil_clear_value[level] != stencil) {
sctx->db_stencil_disable_expclear = true;
}
@@ -1065,7 +1065,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
if (sctx->db_stencil_clear) {
sctx->db_stencil_clear = false;
sctx->db_stencil_disable_expclear = false;
- zstex->stencil_cleared_level_mask |= BITFIELD_BIT(zsbuf->u.tex.level);
+ zstex->stencil_cleared_level_mask_once |= BITFIELD_BIT(zsbuf->u.tex.level);
si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
}
}
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 611bb22afcf..08103a8a6d2 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -388,7 +388,7 @@ struct si_texture {
uint8_t stencil_clear_value[RADEON_SURF_MAX_LEVELS];
uint16_t depth_cleared_level_mask_once; /* if it was cleared at least once */
uint16_t depth_cleared_level_mask; /* track if it's cleared (can be false negative) */
- uint16_t stencil_cleared_level_mask; /* if it was cleared at least once */
+ uint16_t stencil_cleared_level_mask_once; /* if it was cleared at least once */
uint16_t dirty_level_mask; /* each bit says if that mipmap is compressed */
uint16_t stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
enum pipe_format db_render_format : 16;
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index 388743ccf6a..813cc4d438a 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -489,7 +489,7 @@ static void si_reallocate_texture_inplace(struct si_context *sctx, struct si_tex
memcpy(tex->stencil_clear_value, new_tex->stencil_clear_value, sizeof(tex->stencil_clear_value));
tex->tc_compatible_htile = new_tex->tc_compatible_htile;
tex->depth_cleared_level_mask_once = new_tex->depth_cleared_level_mask_once;
- tex->stencil_cleared_level_mask = new_tex->stencil_cleared_level_mask;
+ tex->stencil_cleared_level_mask_once = new_tex->stencil_cleared_level_mask_once;
tex->upgraded_depth = new_tex->upgraded_depth;
tex->db_compatible = new_tex->db_compatible;
tex->can_sample_z = new_tex->can_sample_z;
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