Mesa (main): freedreno/a5xx: Remove bogus assertion about BO size.

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Module: Mesa
Branch: main
Commit: 99f5b7ba1ed3c0b09492d26aae7d69edcced8fd2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=99f5b7ba1ed3c0b09492d26aae7d69edcced8fd2

Author: Emma Anholt <emma at anholt.net>
Date:   Thu Nov  4 10:27:42 2021 -0700

freedreno/a5xx: Remove bogus assertion about BO size.

The slice->size0 temp is being used as both the array stride (incorrectly)
and as the size of the slice (for this assert).  This assert doesn't seem
to be in the right place to me, if you want to check that offset+slice
size is < bo size, you could just do that at the end of layout setup.

This caused troubles when fixing the temp to be the actual array stride
for filling out the HW state, since then rendering to nonzero levels would
think that the rendering overflowed the BO when it doesn't.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

---

 src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index 786cee985aa..6c20f88008d 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -112,7 +112,6 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
          OUT_RING(ring, base);       /* RB_MRT[i].BASE_LO */
          OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */
       } else {
-         debug_assert((offset + size) <= fd_bo_size(rsc->bo));
          OUT_RELOC(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */
       }