Mesa (main): pan/bi: Support dual texture scheduling

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Module: Mesa
Branch: main
Commit: 9b2a383af8afc21279ac67653cf359f4fa3f202a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b2a383af8afc21279ac67653cf359f4fa3f202a

Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date:   Mon Nov  8 14:10:48 2021 -0500

pan/bi: Support dual texture scheduling

Teach the scheduler about dual texturing to avoid an artifical "must not
last" constraint causing suboptimal scheduling like

clause_1:
ds(0) nbb tex ncph dwb(0)
{
    *NOP t0
    +TEXC.skip t1, r0, r1, 0xf1e00144, @r4
    *NOP t0
    +NOP t1
}

Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13723>

---

 src/panfrost/bifrost/bi_schedule.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/panfrost/bifrost/bi_schedule.c b/src/panfrost/bifrost/bi_schedule.c
index d974d4a98f1..a017b00cffc 100644
--- a/src/panfrost/bifrost/bi_schedule.c
+++ b/src/panfrost/bifrost/bi_schedule.c
@@ -524,12 +524,17 @@ bi_can_add(bi_instr *ins)
  * pseudoinstructions writing multiple destinations (expanding to multiple
  * paired instructions) can run afoul of the "no two writes on the last clause"
  * constraint, so we check for that here.
+ *
+ * Exception to the exception: TEXC, which writes to multiple sets of staging
+ * registers. Staging registers bypass the usual register write mechanism so
+ * this restriction does not apply.
  */
 
 static bool
 bi_must_not_last(bi_instr *ins)
 {
-        return !bi_is_null(ins->dest[0]) && !bi_is_null(ins->dest[1]);
+        return !bi_is_null(ins->dest[0]) && !bi_is_null(ins->dest[1]) &&
+               (ins->op != BI_OPCODE_TEXC);
 }
 
 /* Check for a message-passing instruction. +DISCARD.f32 is special-cased; we