Mesa (main): a5xx: remove astc srgb workaround logic
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Mon Nov 15 18:05:35 UTC 2021
Module: Mesa
Branch: main
Commit: 31d6cd224a3a4088de79659a51cf46c372a0620a
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31d6cd224a3a4088de79659a51cf46c372a0620a
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Nov 12 21:18:25 2021 -0500
a5xx: remove astc srgb workaround logic
This was copied from a4xx, which only needs it on one chip model (A420).
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13782>
---
src/freedreno/ir3/ir3_context.c | 5 ++-
src/freedreno/ir3/ir3_shader.h | 2 +-
src/gallium/drivers/freedreno/a5xx/fd5_context.h | 3 --
src/gallium/drivers/freedreno/a5xx/fd5_draw.c | 4 ---
src/gallium/drivers/freedreno/a5xx/fd5_texture.c | 40 +-----------------------
src/gallium/drivers/freedreno/a5xx/fd5_texture.h | 1 -
6 files changed, 4 insertions(+), 51 deletions(-)
diff --git a/src/freedreno/ir3/ir3_context.c b/src/freedreno/ir3/ir3_context.c
index 301514bbee1..03df1684f84 100644
--- a/src/freedreno/ir3/ir3_context.c
+++ b/src/freedreno/ir3/ir3_context.c
@@ -35,14 +35,13 @@ ir3_context_init(struct ir3_compiler *compiler, struct ir3_shader_variant *so)
{
struct ir3_context *ctx = rzalloc(NULL, struct ir3_context);
- if (compiler->gen >= 4) {
+ if (compiler->gen == 4) {
if (so->type == MESA_SHADER_VERTEX) {
ctx->astc_srgb = so->key.vastc_srgb;
} else if (so->type == MESA_SHADER_FRAGMENT) {
ctx->astc_srgb = so->key.fastc_srgb;
}
-
- } else {
+ } else if (compiler->gen == 3) {
if (so->type == MESA_SHADER_VERTEX) {
ctx->samples = so->key.vsamples;
} else if (so->type == MESA_SHADER_FRAGMENT) {
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index b4585724934..9b0cfeac684 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -330,7 +330,7 @@ struct ir3_shader_key {
/* bitmask of ms shifts (a3xx) */
uint32_t vsamples, fsamples;
- /* bitmask of samplers which need astc srgb workaround (a4xx+a5xx): */
+ /* bitmask of samplers which need astc srgb workaround (a4xx): */
uint16_t vastc_srgb, fastc_srgb;
};
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_context.h b/src/gallium/drivers/freedreno/a5xx/fd5_context.h
index 776380eb213..b2ea9e687f0 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_context.h
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_context.h
@@ -51,9 +51,6 @@ struct fd5_context {
struct u_upload_mgr *border_color_uploader;
struct pipe_resource *border_color_buf;
- /* bitmask of samplers which need astc srgb workaround: */
- uint16_t vastc_srgb, fastc_srgb;
-
/* storage for ctx->last.key: */
struct ir3_shader_key last_key;
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
index a5b33f48def..af58229a840 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
@@ -74,7 +74,6 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct pipe_draw_start_count_bias *draw,
unsigned index_offset) in_dt
{
- struct fd5_context *fd5_ctx = fd5_context(ctx);
struct fd5_emit emit = {
.debug = &ctx->debug,
.vtx = &ctx->vtx,
@@ -87,9 +86,6 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
.fs = ctx->prog.fs,
.key = {
.rasterflat = ctx->rasterizer->flatshade,
- .has_per_samp = fd5_ctx->fastc_srgb || fd5_ctx->vastc_srgb,
- .vastc_srgb = fd5_ctx->vastc_srgb,
- .fastc_srgb = fd5_ctx->fastc_srgb,
},
},
.rasterflat = ctx->rasterizer->flatshade,
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
index 4b44e6caee5..2dbadddf719 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
@@ -125,12 +125,6 @@ fd5_sampler_state_create(struct pipe_context *pctx,
return so;
}
-static bool
-use_astc_srgb_workaround(struct pipe_context *pctx, enum pipe_format format)
-{
- return false; // TODO check if this is still needed on a5xx
-}
-
static struct pipe_sampler_view *
fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
const struct pipe_sampler_view *cso)
@@ -173,8 +167,6 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
}
if (util_format_is_srgb(format)) {
- if (use_astc_srgb_workaround(pctx, format))
- so->astc_srgb = true;
so->texconst0 |= A5XX_TEX_CONST_0_SRGB;
}
@@ -235,41 +227,11 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
return &so->base;
}
-static void
-fd5_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
- unsigned start, unsigned nr,
- unsigned unbind_num_trailing_slots,
- bool take_ownership,
- struct pipe_sampler_view **views)
-{
- struct fd_context *ctx = fd_context(pctx);
- struct fd5_context *fd5_ctx = fd5_context(ctx);
- uint16_t astc_srgb = 0;
- unsigned i;
-
- for (i = 0; i < nr; i++) {
- if (views[i]) {
- struct fd5_pipe_sampler_view *view = fd5_pipe_sampler_view(views[i]);
- if (view->astc_srgb)
- astc_srgb |= (1 << i);
- }
- }
-
- fd_set_sampler_views(pctx, shader, start, nr, unbind_num_trailing_slots,
- take_ownership, views);
-
- if (shader == PIPE_SHADER_FRAGMENT) {
- fd5_ctx->fastc_srgb = astc_srgb;
- } else if (shader == PIPE_SHADER_VERTEX) {
- fd5_ctx->vastc_srgb = astc_srgb;
- }
-}
-
void
fd5_texture_init(struct pipe_context *pctx)
{
pctx->create_sampler_state = fd5_sampler_state_create;
pctx->bind_sampler_states = fd_sampler_states_bind;
pctx->create_sampler_view = fd5_sampler_view_create;
- pctx->set_sampler_views = fd5_set_sampler_views;
+ pctx->set_sampler_views = fd_set_sampler_views;
}
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_texture.h b/src/gallium/drivers/freedreno/a5xx/fd5_texture.h
index bccef79b330..aeff1689020 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_texture.h
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_texture.h
@@ -52,7 +52,6 @@ struct fd5_pipe_sampler_view {
uint32_t texconst0, texconst1, texconst2, texconst3, texconst5;
uint32_t texconst6, texconst7, texconst8, texconst9, texconst10, texconst11;
uint32_t offset;
- bool astc_srgb;
};
static inline struct fd5_pipe_sampler_view *
More information about the mesa-commit
mailing list