Mesa (main): aco: workaround GFX9 hardware bug for D16 image instructions
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Mon Nov 15 18:57:32 UTC 2021
Module: Mesa
Branch: main
Commit: 626aa7b648174dccad51e018cf7bd288c6a64750
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=626aa7b648174dccad51e018cf7bd288c6a64750
Author: Daniel Schürmann <daniel at schuermann.dev>
Date: Fri Nov 5 14:24:12 2021 +0100
aco: workaround GFX9 hardware bug for D16 image instructions
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13592>
---
src/amd/compiler/aco_register_allocation.cpp | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index ae96d02bdcb..1eadb916ccf 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -220,6 +220,20 @@ struct DefInfo {
stride = DIV_ROUND_UP(stride, 4);
}
assert(stride > 0);
+ } else if (instr->isMIMG() && instr->mimg().d16 && ctx.program->chip_class <= GFX9) {
+ /* Workaround GFX9 hardware bug for D16 image instructions: FeatureImageGather4D16Bug
+ *
+ * The register use is not calculated correctly, and the hardware assumes a
+ * full dword per component. Don't use the last registers of the register file.
+ * Otherwise, the instruction will be skipped.
+ *
+ * https://reviews.llvm.org/D81172
+ */
+ bool imageGather4D16Bug = operand == -1 && rc == v2 && instr->mimg().dmask != 0xF;
+ assert(ctx.program->chip_class == GFX9 && "Image D16 on GFX8 not supported.");
+
+ if (imageGather4D16Bug)
+ bounds.size -= rc.bytes() / 4;
}
}
};
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