Mesa (main): radv: Fix memory corruption loading RT pipeline cache entries.

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Module: Mesa
Branch: main
Commit: 9494c566c27064687944fb73a16f5437e204c5ab
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9494c566c27064687944fb73a16f5437e204c5ab

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Sun Nov 14 23:57:45 2021 +0100

radv: Fix memory corruption loading RT pipeline cache entries.

Oops. Forgot to account for the size here.

Fixes: ca2d96db51e ("radv: Add caching for RT pipelines.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13789>

---

 src/amd/vulkan/radv_pipeline_cache.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c
index 3ea369333c3..0e8e515f1b1 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -109,6 +109,7 @@ entry_size(struct cache_entry *entry)
    for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; ++i)
       if (entry->binary_sizes[i])
          ret += entry->binary_sizes[i];
+   ret += sizeof(struct radv_pipeline_shader_stack_size) * entry->num_stack_sizes;
    ret = align(ret, alignof(struct cache_entry));
    return ret;
 }