Mesa (staging/21.3): 27 new commits
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Wed Nov 24 20:55:45 UTC 2021
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1324fb8940983b8eb73f8e444051f9bdebf4a081
Author: Thomas H.P. Andersen <phomes at gmail.com>
Date: Sun Aug 1 12:52:56 2021 +0200
svga: fix bitwise/logical and mixup
The function need_temp_reg_initialization looks suspecious.
It will only ever return true if we get past this if:
if (!(emit->info.indirect_files && (1u << TGSI_FILE_TEMPORARY)) ...
Using the logical && means the intended initialization done
based on the result of this check is not performed.
This code was both introduced and altered in MR 5317.
ccb4ea5a introduces the function.
ba37d408 is a collection of performance improvements and misc
fixes. This altered the if from using bitwise to logical and.
This commit changes it back to bitwise.
Spotted from a compile warning.
Fixes: ba37d408da3 ("svga: Performance fixes")
Reviewed-by: Zoltán Böszörményi <zboszor at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12157>
(cherry picked from commit 64292c0f05ba891d9c7319e1a1cea98eb0630af4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=52f25d433fa584d59ec14420e2e7b42c2eacf559
Author: Roman Stratiienko <r.stratiienko at gmail.com>
Date: Mon Nov 22 18:57:01 2021 +0200
android.mk: Add missing variables to the make target
Android build system may use different internal variables to specify
cflags/cppflags.
Small change in product confguration may force Android to use diffrent
set of variables, therefore we should keep all of them attached to the
make rule's target.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5549
Fixes: 8621bd8d5e67 ("android: Add scripts to build using meson")
Signed-off-by: Roman Stratiienko <r.stratiienko at gmail.com>
Acked-by: Jesse Natalie <jenatali at microsoft.com>
Reviewed-by: Marijn Suijten <marijn.suijten at somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13914>
(cherry picked from commit 32ec0fffa6fbe58b0fd76901c6a7dc8a9cfc79b1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44bcb9de4a9329868235b07abb72fd578996b0b3
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Thu Nov 18 10:44:21 2021 +0100
radv: fix emitting VBO when vertex input dynamic state is used
In the following scenario:
CmdBindPipeline()
CmdBindVertexBuffers()
CmdSetVertexInput()
CmdDraw()
CmdBindVertexBuffers()
CmdSetVertexInput()
CmdDraw()
The VBO won't be updated for the second draw because the state is
cleared when the dynamic state is emitted and the pipeline isn't dirty.
Found by inspection.
Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13855>
(cherry picked from commit aee25471b9e83c10430d7ac5c7b80b1ae2d5ad17)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5aa4d40b207eb6caec2eefa497b659fb7c6048f
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Tue Nov 16 17:33:11 2021 +0000
aco/spill: use spills_entry instead of spills_exit to kill linear VGPRs
If a predecessor has only spilled constants (no temporaries), spills_exit
will be empty.
fossil-db (Sienna Cichlid):
Totals from 2 (0.00% of 128647) affected shaders:
Latency: 139106 -> 139104 (-0.00%)
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5633
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13821>
(cherry picked from commit cc2894345f1161fcbb2f9b9150257e0f6b0b303e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=15be321f47a7a15b6ccae7cad9f2a036a26d8ff9
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Tue Jun 29 12:40:39 2021 +0300
intel/fs: fix shader call lowering pass
Now that we removed the intel intrinsic and just use the generic one,
we can skip it in the intel call lowering pass and just deal with it
in the intel rt intrinsic lowering.
v2: rewrite with nir_shader_instructions_pass() (Jason)
v3: handle everything in switch (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 423c47de991643 ("nir: drop the btd_resume_intel intrinsic")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12113>
(cherry picked from commit c5a42e401036eb2eecf8798c103f8ae2cce08eab)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0e69e807fdd468bf96b72241db3b5150f8adf1d
Author: Connor Abbott <cwabbott0 at gmail.com>
Date: Tue Nov 16 15:20:52 2021 +0100
ir3/lower_pcopy: Fix bug with "illegal" copies and swaps
If the source and destination were within the same full register, like
hr90.x and hr90.y (which both map to r45.x), then we'd perform the
swap/copy with the wrong register. This broke
dEQP-VK.ssbo.phys.layout.random.16bit.scalar.35 once BDA is enabled.
Fixes: 0ffcb19b9d9 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13818>
(cherry picked from commit c98adc56f4fe08231b0fec84b6a92c89eb94d59b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=52d319f11f5f72789b53c7a52ab379ccb946f75f
Author: Connor Abbott <cwabbott0 at gmail.com>
Date: Tue Nov 16 15:32:58 2021 +0100
ir3/lower_pcopy: Fix shr.b illegal copy lowering
The immediate shouldn't be half-reg because the other source isn't.
Fixes an assertion failure with
dEQP-VK.ssbo.phys.layout.random.16bit.scalar.35.
Fixes: 0ffcb19b9d9 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13818>
(cherry picked from commit 65da866ad96bbe5a1683c98191331827ea3bd580)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6bcecd41ff624988709ceb3449b37cfb56a2df4c
Author: Connor Abbott <cwabbott0 at gmail.com>
Date: Mon Nov 15 12:11:07 2021 +0100
ir3/ra: Consider reg file size when swapping killed sources
Don't swap a 2-component vector of half-regs with a full reg if that
would result in the half regs going outside of the allowable half-reg
space.
Fixes: d4b5d2a0204 ("ir3/ra: Use killed sources in register eviction")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13818>
(cherry picked from commit 9d88b98b0820198c0050965cbd6f1909b9eb8fa5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7feda89b59fb3dc751173ac0b3d9bd741076f96f
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Fri Nov 19 16:00:15 2021 +0200
anv: don't try to close fd = -1
CID: 1464334
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13879>
(cherry picked from commit 04bd5bb69ba3f33b7e018620eae5e8b6a6da7734)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5b4b710ff799d6b7f9b133a7715d58892bf1dad
Author: Qiang Yu <yuq825 at gmail.com>
Date: Fri Nov 12 14:42:54 2021 +0800
glx/dri3: fix glXQueryContext does not return GLX_RENDER_TYPE value
Cc: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Reviewed-by: Adam Jackson <ajax at redhat.com>
Signed-off-by: Qiang Yu <yuq825 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13772>
(cherry picked from commit cee1dd92bd89374e27e1d431d42f0c469cc6e56e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bee05023d605296d3a612184e6bfb8c99e7ac9f7
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Tue Nov 23 08:49:53 2021 +0100
broadcom/compiler: don't move ldvary earlier if current instruction has ldunif
If we did, we would have the instruction coming right after ldvary write
to the same implicit destination as ldvary at the same time. We prevent
this when merging instructions, but we should make sure we prevent this
when we move ldvary around for pipelining too.
Reviewed-by: Juan A. Suarez <jasuarez at igalia.com>
(cherry picked from commit 79dee14cc218d87ea8a5020507161a363477f09a)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13923>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba8d841609b5d6c0219169721bb21a8567260b8e
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Mon Nov 22 11:27:41 2021 +0100
broadcom/compiler: fix scoreboard locking checks
According to the spec the hardware locks the scoreboard on the first
or last thread switch (selected via shader state) and any TLB accesses
executed before this are not synchronized by hardware.
This change updates the logic to ensure we respect this requirement
and that we don't assume that the lock is acquired automatically
on the first TLB access, which is not valid at least since V3D 4.1+.
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
(cherry picked from commit 7fec4f4135210b83556004c6634d78d4ed33a525)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13923>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4827d0b2becff41e128a21aa0f922fa64e8fdbc
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Mon Nov 22 12:23:13 2021 +0100
broadcom/compiler: don't allow RF writes from signals after thrend
Writes to physical registers are not allowed after thread end. We
were checking this for ALU writes, but we need to check it for
signal writes too.
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
(cherry picked from commit bd7584c16bc56fdcb3a7a720c9a857e158f699d2)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13923>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6995a2e3d6168164e210ada215480c7dd5f50612
Author: Eric Engestrom <eric at engestrom.ch>
Date: Wed Nov 24 08:07:48 2021 +0000
.pick_status.json: Update to d106e5c73265f899f7204f7353969be945d6eda3
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07c68d78b52e6db967c960b7844d0ba8c405bff5
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Nov 16 11:08:15 2021 +0100
radv: disable HTILE for D32S8 format and mipmaps on GFX10
Stencil texturing with HTILE doesn't work with mipmapping on Navi10-14,
it's a hw bug. RadeonSI and PAL have a workaround too.
This fixes 35 piglit failures with Zink on Navi10.
Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13814>
(cherry picked from commit 341278f069a54a173fa646b16e0b68eefd28e5ed)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dacb05c497beab036f97bde16174983d4104a404
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Tue Nov 16 17:45:58 2021 -0500
zink: fail context creation more gracefully
handle some cases where context creation fails earlier than expected
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13844>
(cherry picked from commit a3be30665f1f8bb140069728fd8e17ce6fcdbaa4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7265b1b17a2acf13d84789aa50b3b2b9a4f59aa
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed Nov 17 16:48:28 2021 -0500
zink: fix memory availability reporting
this shouldn't report the budgeted available memory, it should return
the total memory, as that's what this api expects
Fixes: ff4ba3d4a77 ("zink: support PIPE_CAP_QUERY_MEMORY_INFO")
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
(cherry picked from commit 72a88c77def2948e291427c963e2f4337bc059d4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba011bfe7dab3fc33ae97dec5abe8df704941e3b
Author: Iván Briano <ivan.briano at intel.com>
Date: Wed Nov 17 11:02:26 2021 -0800
intel/nir: also allow unknown format for getting the size of a storage image
Fixes: fa251cf111df ("intel/nir: allow unknown format in lowering of storage images")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13847>
(cherry picked from commit 0388783a03e48b7efce984436a2b424c95761522)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db61647bd53133957b2d724c2629f59299336413
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Nov 16 17:02:50 2021 -0800
glsl/nir: Don't build soft float64 when it cannot be used
Fixes: 82d9a37a59c ("glsl/nir: Add a shared helper for building float64 shaders")
Closes: #5556
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13828>
(cherry picked from commit 04f5c543ded15362dc6286ff4ae7a38f00f6ca7e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bc4ed47ff0a3d097b9c8a9e4655bfd78807e3b5
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Thu Nov 11 12:23:29 2021 -0500
zink: always set matching resource export type for dmabuf creation
both of these need to be set if one is
cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
(cherry picked from commit 943f6a038db868004d118db128564dd2e5c6e650)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0fe0e094e56a7b7b2456ff829a3ef4848f070d5
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Thu Nov 11 12:11:33 2021 -0500
zink: stop using VK_IMAGE_LAYOUT_PREINITIALIZED for dmabuf
this is illegal
cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
(cherry picked from commit 11c79a8bd79178ab027438b018379051e33430c8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f92ad133780cc1c65dd7d248073473432e580d7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 15 19:14:01 2021 -0800
iris: Tidy code in iris_use_pinned_bo a bit
Now that we aren't short-circuiting most of the code, we should probably
reorganize it a little bit. Tagged with fixes just so we pull all the
refactors together as one group.
Fixes: b21e916a628 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
(cherry picked from commit 3b78f175323f1db5ae28da264d5761bebb4f7052)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87309ea5c23ea138f37c0d3849a9fad15bbe04b4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 15 19:08:55 2021 -0800
iris: Check for cross-batch flushing whenever a buffer is newly written.
We need to perform cross-batch flushing if any batch writes to a BO
while others refer to it. We checked this case when recording a new
BO in the list which we'd never seen before. However, we neglected to
handle the case when we already read from a BO, but then began writing
to it. That new write may provoke a conflict between existing reads
in other batches, so we need to re-check the cross-batch flushing.
Caught by Piglit's copyteximage when forcing blits and copies to use
a new IRIS_BATCH_BLITTER that isn't upstream yet. But this bug could
be provoked by render/compute work today...we just hadn't noticed it.
Fixes: b21e916a628 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
(cherry picked from commit 6e909849349062985fe279296bfb0eb3c94b494c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f73ab966219058189c1140796638a2120bb277be
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 15 19:02:31 2021 -0800
iris: Make a helper function for cross-batch dependency flushing
This should have no functional change, but it's tagged with Fixes
anyway because it's needed for the bug fix in the next patch.
Fixes: b21e916a628 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
(cherry picked from commit 76030964a65a527b30bb46f2ff806ddafdd3fc2d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdf2f6fa033cfa0b3b441169a33512bb22ecaf87
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Tue Nov 16 17:19:43 2021 -0500
zink: set suballocator bo size to aligned allocation size
this is the actual memory size
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13824>
(cherry picked from commit 97b92c9c32a508b9aa85458661b762ffde1c590a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0da127e399782d76097a4ce030f14c377e7535f4
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Tue Nov 16 16:27:59 2021 -0500
zink: block suballocator caching for swapchain/dmabuf images
these have pNext pointers which makes their memory uncacheable
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13824>
(cherry picked from commit eb6f1d53482b83feb51dac0f0fffd4291b651848)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2168da43a84d5f0020774b723ba79c11ad8ec732
Author: Eric Engestrom <eric at engestrom.ch>
Date: Thu Nov 18 19:01:10 2021 +0000
.pick_status.json: Update to 341278f069a54a173fa646b16e0b68eefd28e5ed
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