Mesa (main): broadcom/compiler: allow color TLB writes in last instruction

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Module: Mesa
Branch: main
Commit: 6923dd687c114b197c0844b24cab095404450714
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6923dd687c114b197c0844b24cab095404450714

Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Thu Nov 25 11:59:48 2021 +0100

broadcom/compiler: allow color TLB writes in last instruction

Only Z writes are disallowed.

total instructions in shared programs: 11578449 -> 11577369 (<.01%)
instructions in affected programs: 38132 -> 37052 (-2.83%)
helped: 1080
HURT: 0
Instructions are helped.

total max-temps in shared programs: 2334416 -> 2334395 (<.01%)
max-temps in affected programs: 218 -> 197 (-9.63%)
helped: 21
HURT: 0
Max-temps are helped.

total inst-and-stalls in shared programs: 11607890 -> 11606810 (<.01%)
inst-and-stalls in affected programs: 38265 -> 37185 (-2.82%)
helped: 1080
HURT: 0
Inst-and-stalls are helped.

total nops in shared programs: 338316 -> 337236 (-0.32%)
nops in affected programs: 2625 -> 1545 (-41.14%)
helped: 1080
HURT: 0
Nops are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13964>

---

 src/broadcom/compiler/nir_to_vir.c   | 1 +
 src/broadcom/compiler/qpu_schedule.c | 5 +----
 src/broadcom/compiler/v3d_compiler.h | 3 +++
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c
index 659e70ee005..b5ca46ee484 100644
--- a/src/broadcom/compiler/nir_to_vir.c
+++ b/src/broadcom/compiler/nir_to_vir.c
@@ -1757,6 +1757,7 @@ emit_frag_end(struct v3d_compile *c)
                 inst->uniform = vir_get_uniform_index(c, QUNIFORM_CONSTANT,
                                                       tlb_specifier |
                                                       0xffffff00);
+                inst->is_tlb_z_write = true;
         }
 
         /* XXX: Performance improvement: Merge Z write and color writes TLB
diff --git a/src/broadcom/compiler/qpu_schedule.c b/src/broadcom/compiler/qpu_schedule.c
index 6fd27b42e90..63a6e89c5ad 100644
--- a/src/broadcom/compiler/qpu_schedule.c
+++ b/src/broadcom/compiler/qpu_schedule.c
@@ -1503,10 +1503,7 @@ qpu_inst_valid_in_thrend_slot(struct v3d_compile *c,
 {
         const struct v3d_qpu_instr *inst = &qinst->qpu;
 
-        /* Only TLB Z writes are prohibited in the last slot, but we don't
-         * have those flagged so prohibit all TLB ops for now.
-         */
-        if (slot == 2 && qpu_inst_is_tlb(inst))
+        if (slot == 2 && qinst->is_tlb_z_write)
                 return false;
 
         if (slot > 0 && qinst->uniform != ~0)
diff --git a/src/broadcom/compiler/v3d_compiler.h b/src/broadcom/compiler/v3d_compiler.h
index a4f4d5dae01..774632b905a 100644
--- a/src/broadcom/compiler/v3d_compiler.h
+++ b/src/broadcom/compiler/v3d_compiler.h
@@ -169,6 +169,9 @@ struct qinst {
          * otherwise.
          */
         int uniform;
+
+        /* If this is a a TLB Z write */
+        bool is_tlb_z_write;
 };
 
 enum quniform_contents {