Mesa (main): intel/isl: Add a max_buffer_size limit to isl_device
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Wed Oct 6 02:41:06 UTC 2021
Module: Mesa
Branch: main
Commit: 231653ea3506d77e5e418e89c5b27ec09f4a7bab
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=231653ea3506d77e5e418e89c5b27ec09f4a7bab
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Tue Sep 7 10:28:41 2021 -0500
intel/isl: Add a max_buffer_size limit to isl_device
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13199>
---
src/intel/isl/isl.c | 15 +++++++++++++++
src/intel/isl/isl.h | 2 ++
src/intel/isl/isl_surface_state.c | 16 +++++-----------
src/intel/vulkan/anv_device.c | 6 +-----
4 files changed, 23 insertions(+), 16 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 7e825be0a59..d3d611e2208 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -265,6 +265,21 @@ isl_device_init(struct isl_device *dev,
dev->ds.hiz_offset = 0;
}
+ if (ISL_GFX_VER(dev) >= 7) {
+ /* From the IVB PRM, SURFACE_STATE::Height,
+ *
+ * For typed buffer and structured buffer surfaces, the number
+ * of entries in the buffer ranges from 1 to 2^27. For raw buffer
+ * surfaces, the number of entries in the buffer is the number of bytes
+ * which can range from 1 to 2^30.
+ *
+ * This limit is only concerned with raw buffers.
+ */
+ dev->max_buffer_size = 1ull << 30;
+ } else {
+ dev->max_buffer_size = 1ull << 27;
+ }
+
isl_device_setup_mocs(dev);
}
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 221f9f0754a..1aa5dc5ab36 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1255,6 +1255,8 @@ struct isl_device {
uint8_t clear_value_offset;
} ss;
+ uint64_t max_buffer_size;
+
/**
* Describes the layout of the depth/stencil/hiz commands as emitted by
* isl_emit_depth_stencil_hiz.
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index 4418a62eaa0..40415bd3b92 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -875,21 +875,15 @@ isl_genX(buffer_fill_state_s)(const struct isl_device *dev, void *state,
uint32_t num_elements = buffer_size / info->stride_B;
- if (GFX_VER >= 7) {
+ assert(num_elements > 0);
+ if (info->format == ISL_FORMAT_RAW) {
+ assert(num_elements <= dev->max_buffer_size);
+ } else {
/* From the IVB PRM, SURFACE_STATE::Height,
*
* For typed buffer and structured buffer surfaces, the number
- * of entries in the buffer ranges from 1 to 2^27. For raw buffer
- * surfaces, the number of entries in the buffer is the number of bytes
- * which can range from 1 to 2^30.
+ * of entries in the buffer ranges from 1 to 2^27.
*/
- if (info->format == ISL_FORMAT_RAW) {
- assert(num_elements <= (1ull << 30));
- assert(num_elements > 0);
- } else {
- assert(num_elements <= (1ull << 27));
- }
- } else {
assert(num_elements <= (1ull << 27));
}
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index fde239caaf3..dd8a49138e4 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1775,10 +1775,6 @@ void anv_GetPhysicalDeviceProperties(
ANV_FROM_HANDLE(anv_physical_device, pdevice, physicalDevice);
const struct intel_device_info *devinfo = &pdevice->info;
- /* See assertions made when programming the buffer surface state. */
- const uint32_t max_raw_buffer_sz = devinfo->ver >= 7 ?
- (1ul << 30) : (1ul << 27);
-
const uint32_t max_ssbos = pdevice->has_a64_buffer_access ? UINT16_MAX : 64;
const uint32_t max_textures =
pdevice->has_bindless_images ? UINT16_MAX : 128;
@@ -1809,7 +1805,7 @@ void anv_GetPhysicalDeviceProperties(
.maxImageArrayLayers = (1 << 11),
.maxTexelBufferElements = 128 * 1024 * 1024,
.maxUniformBufferRange = (1ul << 27),
- .maxStorageBufferRange = max_raw_buffer_sz,
+ .maxStorageBufferRange = pdevice->isl_dev.max_buffer_size,
.maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE,
.maxMemoryAllocationCount = UINT32_MAX,
.maxSamplerAllocationCount = 64 * 1024,
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