Mesa (main): radv: Add VK_FORMAT_R16G16B16A16_UNORM for accel. structures.
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Thu Oct 7 09:20:06 UTC 2021
Module: Mesa
Branch: main
Commit: 954602b1f86a77f623084df27c143d95bc568abc
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=954602b1f86a77f623084df27c143d95bc568abc
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Wed Oct 6 00:31:02 2021 +0200
radv: Add VK_FORMAT_R16G16B16A16_UNORM for accel. structures.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13240>
---
src/amd/vulkan/radv_acceleration_structure.c | 18 ++++++++++++++++--
src/amd/vulkan/radv_formats.c | 1 +
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_acceleration_structure.c b/src/amd/vulkan/radv_acceleration_structure.c
index 83b3fb262e7..04424f60566 100644
--- a/src/amd/vulkan/radv_acceleration_structure.c
+++ b/src/amd/vulkan/radv_acceleration_structure.c
@@ -269,6 +269,12 @@ build_triangles(struct radv_bvh_build_ctx *ctx, const VkAccelerationStructureGeo
coords[2] = _mesa_snorm_to_float(*(const int16_t *)(v_data + 4), 16);
coords[3] = _mesa_snorm_to_float(*(const int16_t *)(v_data + 6), 16);
break;
+ case VK_FORMAT_R16G16B16A16_UNORM:
+ coords[0] = _mesa_unorm_to_float(*(const uint16_t *)(v_data + 0), 16);
+ coords[1] = _mesa_unorm_to_float(*(const uint16_t *)(v_data + 2), 16);
+ coords[2] = _mesa_unorm_to_float(*(const uint16_t *)(v_data + 4), 16);
+ coords[3] = _mesa_unorm_to_float(*(const uint16_t *)(v_data + 6), 16);
+ break;
default:
unreachable("Unhandled vertex format in BVH build");
}
@@ -764,7 +770,7 @@ get_vertices(nir_builder *b, nir_ssa_def *addresses, nir_ssa_def *format, nir_ss
VkFormat formats[] = {
VK_FORMAT_R32G32B32_SFLOAT, VK_FORMAT_R32G32B32A32_SFLOAT, VK_FORMAT_R16G16B16_SFLOAT,
VK_FORMAT_R16G16B16A16_SFLOAT, VK_FORMAT_R16G16_SFLOAT, VK_FORMAT_R32G32_SFLOAT,
- VK_FORMAT_R16G16_SNORM, VK_FORMAT_R16G16B16A16_SNORM,
+ VK_FORMAT_R16G16_SNORM, VK_FORMAT_R16G16B16A16_SNORM, VK_FORMAT_R16G16B16A16_UNORM,
};
for (unsigned f = 0; f < ARRAY_SIZE(formats); ++f) {
@@ -785,7 +791,8 @@ get_vertices(nir_builder *b, nir_ssa_def *addresses, nir_ssa_def *format, nir_ss
case VK_FORMAT_R16G16B16_SFLOAT:
case VK_FORMAT_R16G16B16A16_SFLOAT:
case VK_FORMAT_R16G16_SNORM:
- case VK_FORMAT_R16G16B16A16_SNORM: {
+ case VK_FORMAT_R16G16B16A16_SNORM:
+ case VK_FORMAT_R16G16B16A16_UNORM: {
unsigned components = MIN2(3, vk_format_get_nr_components(formats[f]));
unsigned comp_bits =
vk_format_get_blocksizebits(formats[f]) / vk_format_get_nr_components(formats[f]);
@@ -808,6 +815,13 @@ get_vertices(nir_builder *b, nir_ssa_def *addresses, nir_ssa_def *format, nir_ss
values[j] = nir_fmax(b, values[j], nir_imm_float(b, -1.0));
}
vec = nir_vec(b, values, 3);
+ } else if (util_format_is_unorm(vk_format_to_pipe_format(formats[f]))) {
+ for (unsigned j = 0; j < 3; ++j) {
+ values[j] =
+ nir_fdiv(b, nir_u2f32(b, values[j]), nir_imm_float(b, (1u << comp_bits) - 1));
+ values[j] = nir_fmin(b, values[j], nir_imm_float(b, 1.0));
+ }
+ vec = nir_vec(b, values, 3);
} else if (comp_bits == 16)
vec = nir_f2f32(b, nir_vec(b, values, 3));
else
diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index 0f217cd0100..57b88abe49c 100644
--- a/src/amd/vulkan/radv_formats.c
+++ b/src/amd/vulkan/radv_formats.c
@@ -787,6 +787,7 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
case VK_FORMAT_R16G16B16A16_SFLOAT:
case VK_FORMAT_R16G16_SNORM:
case VK_FORMAT_R16G16B16A16_SNORM:
+ case VK_FORMAT_R16G16B16A16_UNORM:
buffer |= VK_FORMAT_FEATURE_ACCELERATION_STRUCTURE_VERTEX_BUFFER_BIT_KHR;
break;
default:
More information about the mesa-commit
mailing list