Mesa (main): intel/isl: Add mocs settings for DG2

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Module: Mesa
Branch: main
Commit: 8e735dc72c942f3fb45e31775dcd52cd31c6f890
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e735dc72c942f3fb45e31775dcd52cd31c6f890

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Wed Sep 16 00:55:17 2020 -0700

intel/isl: Add mocs settings for DG2

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12712>

---

 src/intel/isl/isl.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index d3d611e2208..55b9c5ba94b 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -99,7 +99,11 @@ static void
 isl_device_setup_mocs(struct isl_device *dev)
 {
    if (dev->info->ver >= 12) {
-      if (dev->info->is_dg1) {
+      if (dev->info->is_dg2) {
+         /* L3CC=WB; BSpec: 45101 */
+         dev->mocs.internal = 3 << 1;
+         dev->mocs.external = 3 << 1;
+      } else if (dev->info->is_dg1) {
          /* L3CC=WB */
          dev->mocs.internal = 5 << 1;
          /* Displayables on DG1 are free to cache in L3 since L3 is transient