Mesa (main): radv: remove radv_pipeline::layout
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gitlab-mirror at kemper.freedesktop.org
Mon Oct 11 09:14:45 UTC 2021
Module: Mesa
Branch: main
Commit: ea281f5f0a8100cfb478d7c8c0ef725db9e67bc2
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea281f5f0a8100cfb478d7c8c0ef725db9e67bc2
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Oct 6 15:28:20 2021 +0200
radv: remove radv_pipeline::layout
>From the VK_KHR_maintenance4 spec:
"Allow the application to destroy their VkPipelineLayout object
immediately after it was used to create another object. It is no
longer necessary to keep its handle valid while the created object
is in use."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
---
src/amd/vulkan/radv_cmd_buffer.c | 11 ++++-----
src/amd/vulkan/radv_pipeline.c | 50 ++++++++++++++++++++++------------------
src/amd/vulkan/radv_private.h | 6 +++--
src/amd/vulkan/radv_shader.h | 6 +++--
4 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index ddc73bcd8a8..063f493f071 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2847,7 +2847,6 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, VkShaderStageFlags stag
{
struct radv_descriptor_state *descriptors_state =
radv_get_descriptors_state(cmd_buffer, bind_point);
- struct radv_pipeline_layout *layout = pipeline->layout;
struct radv_shader_variant *shader, *prev_shader;
bool need_push_constants = false;
unsigned offset;
@@ -2857,7 +2856,7 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, VkShaderStageFlags stag
uint32_t dirty_stages = 0;
stages &= cmd_buffer->push_constant_stages;
- if (!stages || (!layout->push_constant_size && !layout->dynamic_offset_count))
+ if (!stages || (!pipeline->push_constant_size && !pipeline->dynamic_offset_count))
return;
internal_stages = stages;
@@ -2891,13 +2890,13 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, VkShaderStageFlags stag
if (need_push_constants) {
if (!radv_cmd_buffer_upload_alloc(
- cmd_buffer, layout->push_constant_size + 16 * layout->dynamic_offset_count, &offset,
+ cmd_buffer, pipeline->push_constant_size + 16 * pipeline->dynamic_offset_count, &offset,
&ptr))
return;
- memcpy(ptr, cmd_buffer->push_constants, layout->push_constant_size);
- memcpy((char *)ptr + layout->push_constant_size, descriptors_state->dynamic_buffers,
- 16 * layout->dynamic_offset_count);
+ memcpy(ptr, cmd_buffer->push_constants, pipeline->push_constant_size);
+ memcpy((char *)ptr + pipeline->push_constant_size, descriptors_state->dynamic_buffers,
+ 16 * pipeline->dynamic_offset_count);
va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
va += offset;
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 581a77fa808..af37ed5a5af 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2810,6 +2810,7 @@ radv_determine_ngg_settings(struct radv_pipeline *pipeline,
static void
radv_fill_shader_info(struct radv_pipeline *pipeline,
+ struct radv_pipeline_layout *pipeline_layout,
const VkPipelineShaderStageCreateInfo **pStages,
const struct radv_pipeline_key *pipeline_key,
struct radv_shader_info *infos, nir_shader **nir)
@@ -2885,7 +2886,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
if (nir[MESA_SHADER_FRAGMENT]) {
radv_nir_shader_info_init(&infos[MESA_SHADER_FRAGMENT]);
- radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout,
+ radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline_layout,
pipeline_key, &infos[MESA_SHADER_FRAGMENT]);
assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
@@ -2930,7 +2931,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
infos[MESA_SHADER_TESS_CTRL].vs.as_ls = true;
for (int i = 0; i < 2; i++) {
- radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, pipeline_key,
+ radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline_layout, pipeline_key,
&infos[MESA_SHADER_TESS_CTRL]);
}
@@ -2957,7 +2958,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
infos[MESA_SHADER_GEOMETRY].gs.es_type = pre_stage;
for (int i = 0; i < 2; i++) {
- radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, pipeline_key,
+ radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline_layout, pipeline_key,
&infos[MESA_SHADER_GEOMETRY]);
}
@@ -2969,7 +2970,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
while (active_stages) {
int i = u_bit_scan(&active_stages);
radv_nir_shader_info_init(&infos[i]);
- radv_nir_shader_info_pass(pipeline->device, nir[i], pipeline->layout, pipeline_key, &infos[i]);
+ radv_nir_shader_info_pass(pipeline->device, nir[i], pipeline_layout, pipeline_key, &infos[i]);
}
if (nir[MESA_SHADER_COMPUTE]) {
@@ -3348,8 +3349,9 @@ non_uniform_access_callback(const nir_src *src, void *_)
}
VkResult
-radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
- struct radv_pipeline_cache *cache, const struct radv_pipeline_key *pipeline_key,
+radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout *pipeline_layout,
+ struct radv_device *device, struct radv_pipeline_cache *cache,
+ const struct radv_pipeline_key *pipeline_key,
const VkPipelineShaderStageCreateInfo **pStages,
const VkPipelineCreateFlags flags, const uint8_t *custom_hash,
VkPipelineCreationFeedbackEXT *pipeline_feedback,
@@ -3391,7 +3393,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
if (custom_hash)
memcpy(hash, custom_hash, 20);
else {
- radv_hash_shaders(hash, pStages, pipeline->layout, pipeline_key,
+ radv_hash_shaders(hash, pStages, pipeline_layout, pipeline_key,
radv_get_hash_flags(device, keep_statistic_info));
}
memcpy(gs_copy_hash, hash, 20);
@@ -3438,7 +3440,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
nir[i] = radv_shader_compile_to_nir(device, modules[i], stage ? stage->pName : "main", i,
stage ? stage->pSpecializationInfo : NULL,
- pipeline->layout, pipeline_key);
+ pipeline_layout, pipeline_key);
/* We don't want to alter meta shaders IR directly so clone it
* first.
@@ -3474,7 +3476,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
gather_tess_info(device, nir, infos, pipeline_key);
}
- radv_fill_shader_info(pipeline, pStages, pipeline_key, infos, nir);
+ radv_fill_shader_info(pipeline, pipeline_layout, pStages, pipeline_key, infos, nir);
bool pipeline_has_ngg = (nir[MESA_SHADER_VERTEX] && infos[MESA_SHADER_VERTEX].is_ngg) ||
(nir[MESA_SHADER_TESS_EVAL] && infos[MESA_SHADER_TESS_EVAL].is_ngg);
@@ -3613,7 +3615,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
if (infos[MESA_SHADER_GEOMETRY].vs.outinfo.export_clip_dists)
info.vs.outinfo.export_clip_dists = true;
- radv_nir_shader_info_pass(device, nir[MESA_SHADER_GEOMETRY], pipeline->layout, pipeline_key,
+ radv_nir_shader_info_pass(device, nir[MESA_SHADER_GEOMETRY], pipeline_layout, pipeline_key,
&info);
info.wave_size = 64; /* Wave32 not supported. */
info.workgroup_size = 64; /* HW VS: separate waves, no workgroups */
@@ -3645,7 +3647,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
radv_start_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT]);
pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_variant_compile(
- device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline->layout,
+ device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline_layout,
pipeline_key, infos + MESA_SHADER_FRAGMENT, keep_executable_info,
keep_statistic_info, &binaries[MESA_SHADER_FRAGMENT]);
@@ -3660,7 +3662,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
radv_start_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL]);
pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(
- device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline->layout, pipeline_key,
+ device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline_layout, pipeline_key,
&infos[MESA_SHADER_TESS_CTRL], keep_executable_info, keep_statistic_info,
&binaries[MESA_SHADER_TESS_CTRL]);
@@ -3678,7 +3680,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
radv_start_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY]);
pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(
- device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline->layout, pipeline_key,
+ device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline_layout, pipeline_key,
&infos[MESA_SHADER_GEOMETRY], keep_executable_info,
keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]);
@@ -3692,7 +3694,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
radv_start_feedback(stage_feedbacks[i]);
pipeline->shaders[i] = radv_shader_variant_compile(
- device, modules[i], &nir[i], 1, pipeline->layout, pipeline_key, infos + i,
+ device, modules[i], &nir[i], 1, pipeline_layout, pipeline_key, infos + i,
keep_executable_info, keep_statistic_info, &binaries[i]);
radv_stop_feedback(stage_feedbacks[i], false);
@@ -5491,12 +5493,11 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct radv_graphics_pipeline_create_info *extra)
{
+ RADV_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, pCreateInfo->layout);
VkResult result;
pipeline->device = device;
- pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout);
pipeline->graphics.last_vgt_api_stage = MESA_SHADER_NONE;
- assert(pipeline->layout);
struct radv_blend_state blend = radv_pipeline_init_blend_state(pipeline, pCreateInfo, extra);
@@ -5521,8 +5522,8 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device,
struct radv_pipeline_key key =
radv_generate_graphics_pipeline_key(pipeline, pCreateInfo, &blend);
- result = radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags, NULL,
- pipeline_feedback, stage_feedbacks);
+ result = radv_create_shaders(pipeline, pipeline_layout, device, cache, &key, pStages,
+ pCreateInfo->flags, NULL, pipeline_feedback, stage_feedbacks);
if (result != VK_SUCCESS)
return result;
@@ -5596,6 +5597,9 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device,
pipeline->graphics.is_ngg &&
pipeline->shaders[pipeline->graphics.last_vgt_api_stage]->info.has_ngg_culling;
+ pipeline->push_constant_size = pipeline_layout->push_constant_size;
+ pipeline->dynamic_offset_count = pipeline_layout->dynamic_offset_count;
+
radv_pipeline_generate_pm4(pipeline, pCreateInfo, extra, &blend);
return result;
@@ -5754,6 +5758,7 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
{
RADV_FROM_HANDLE(radv_device, device, _device);
RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
+ RADV_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, pCreateInfo->layout);
const VkPipelineShaderStageCreateInfo *pStages[MESA_SHADER_STAGES] = {
0,
};
@@ -5773,10 +5778,8 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
pipeline->device = device;
pipeline->graphics.last_vgt_api_stage = MESA_SHADER_NONE;
- pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout);
pipeline->compute.rt_stack_sizes = rt_stack_sizes;
pipeline->compute.group_count = rt_group_count;
- assert(pipeline->layout);
const VkPipelineCreationFeedbackCreateInfoEXT *creation_feedback =
vk_find_struct_const(pCreateInfo->pNext, PIPELINE_CREATION_FEEDBACK_CREATE_INFO_EXT);
@@ -5791,8 +5794,8 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
struct radv_pipeline_key key = radv_generate_compute_pipeline_key(pipeline, pCreateInfo);
- result = radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags,
- custom_hash, pipeline_feedback, stage_feedbacks);
+ result = radv_create_shaders(pipeline, pipeline_layout, device, cache, &key, pStages,
+ pCreateInfo->flags, custom_hash, pipeline_feedback, stage_feedbacks);
if (result != VK_SUCCESS) {
radv_pipeline_destroy(device, pipeline, pAllocator);
return result;
@@ -5804,6 +5807,9 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
radv_shader_need_indirect_descriptor_sets(pipeline, MESA_SHADER_COMPUTE);
radv_pipeline_init_scratch(device, pipeline);
+ pipeline->push_constant_size = pipeline_layout->push_constant_size;
+ pipeline->dynamic_offset_count = pipeline_layout->dynamic_offset_count;
+
radv_compute_generate_pm4(pipeline);
*pPipeline = radv_pipeline_to_handle(pipeline);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index f49d59ca8df..ae2b4a00c30 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1736,8 +1736,6 @@ struct radv_pipeline {
struct radv_device *device;
struct radv_dynamic_state dynamic_state;
- struct radv_pipeline_layout *layout;
-
bool need_indirect_descriptor_sets;
struct radv_shader_variant *shaders[MESA_SHADER_STAGES];
struct radv_shader_variant *gs_copy_shader;
@@ -1815,6 +1813,10 @@ struct radv_pipeline {
/* Unique pipeline hash identifier. */
uint64_t pipeline_hash;
+
+ /* Pipeline layout info. */
+ uint32_t push_constant_size;
+ uint32_t dynamic_offset_count;
};
static inline bool
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 1918460e6b4..90cfaed5a9b 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -423,8 +423,10 @@ nir_shader *radv_shader_compile_to_nir(struct radv_device *device, struct vk_sha
void radv_destroy_shader_slabs(struct radv_device *device);
-VkResult radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
- struct radv_pipeline_cache *cache, const struct radv_pipeline_key *key,
+VkResult radv_create_shaders(struct radv_pipeline *pipeline,
+ struct radv_pipeline_layout *pipeline_layout,
+ struct radv_device *device, struct radv_pipeline_cache *cache,
+ const struct radv_pipeline_key *key,
const VkPipelineShaderStageCreateInfo **pStages,
const VkPipelineCreateFlags flags, const uint8_t *custom_hash,
VkPipelineCreationFeedbackEXT *pipeline_feedback,
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