Mesa (staging/21.2): anv: add missing transition handling bits

[GitLab Mirror]

Module: Mesa
Branch: staging/21.2
Commit: 346083fac02c09ad5e7203d74946e2cde45c3056
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=346083fac02c09ad5e7203d74946e2cde45c3056

Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Wed Nov 11 11:36:33 2020 +0200

anv: add missing transition handling bits

New access flags & pipeline stages got added for transform feedback
and we missed handling them.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 36ee2fd61c8f ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9045>
(cherry picked from commit ad9d95eee4065be9e54fba7da21f7df4583ddb8a)

---

 .pick_status.json                  |  2 +-
 src/intel/vulkan/anv_private.h     | 21 +++++++++++++++------
 src/intel/vulkan/genX_cmd_buffer.c |  3 ++-
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index bd34bc1880f..175152ca753 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -238,7 +238,7 @@
         "description": "anv: add missing transition handling bits",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "36ee2fd61c8f943be1d1e2b0354f7a121ffef28f"
     },
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 423d178d35f..0f0101a60bf 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2601,6 +2601,14 @@ anv_pipe_flush_bits_for_access_flags(struct anv_device *device,
          pipe_bits |= ANV_PIPE_FLUSH_BITS;
          pipe_bits |= ANV_PIPE_INVALIDATE_BITS;
          break;
+      case VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT:
+      case VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT:
+         /* We're transitioning a buffer written either from VS stage or from
+          * the command streamer (see CmdEndTransformFeedbackEXT), we just
+          * need to stall the CS.
+          */
+         pipe_bits |= ANV_PIPE_CS_STALL_BIT;
+         break;
       default:
          break; /* Nothing to do */
       }
@@ -2680,18 +2688,19 @@ anv_pipe_invalidate_bits_for_access_flags(struct anv_device *device,
          pipe_bits |= ANV_PIPE_FLUSH_BITS;
          break;
       case VK_ACCESS_CONDITIONAL_RENDERING_READ_BIT_EXT:
-         /* Transitioning a buffer for conditional rendering. We'll load the
-          * content of this buffer into HW registers using the command
-          * streamer, so we need to stall the command streamer to make sure
-          * any in-flight flush operations have completed. Needs tile cache 
-          * and data cache flush because command stream isn't L3 coherent yet.
+      case VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT:
+         /* Transitioning a buffer for conditional rendering or transform
+          * feedback. We'll load the content of this buffer into HW registers
+          * using the command streamer, so we need to stall the command
+          * streamer , so we need to stall the command streamer to make sure
+          * any in-flight flush operations have completed.
           */
          pipe_bits |= ANV_PIPE_CS_STALL_BIT;
          pipe_bits |= ANV_PIPE_TILE_CACHE_FLUSH_BIT;
          pipe_bits |= ANV_PIPE_DATA_CACHE_FLUSH_BIT;
          break;
       case VK_ACCESS_HOST_READ_BIT:
-         /* We're transitioning a buffer that was written by CPU.  Flush 
+         /* We're transitioning a buffer that was written by CPU.  Flush
           * all the caches.
           */
          pipe_bits |= ANV_PIPE_FLUSH_BITS;
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 4f39e01ad3f..e1052f04589 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -6824,7 +6824,8 @@ void genX(CmdEndConditionalRenderingEXT)(
     VK_PIPELINE_STAGE_TRANSFER_BIT | \
     VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT | \
     VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT | \
-    VK_PIPELINE_STAGE_ALL_COMMANDS_BIT)
+    VK_PIPELINE_STAGE_ALL_COMMANDS_BIT | \
+    VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT)
 
 void genX(CmdSetEvent)(
     VkCommandBuffer                             commandBuffer,