Mesa (main): radeonsi: do not use staging texture for APU
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Wed Oct 13 11:00:21 UTC 2021
Module: Mesa
Branch: main
Commit: 33484a327e7dd9102c49ed11d138d9bf1cd683ca
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=33484a327e7dd9102c49ed11d138d9bf1cd683ca
Author: Yipeng Chen (Jasber) <yipeng.chen at amd.corp-partner.google.com>
Date: Tue Oct 12 16:37:24 2021 +0800
radeonsi: do not use staging texture for APU
This is to fix serious performance drop of texture_upload/
texture_resue relative items in chromeos glbench test.
Staging texture is not efficient for CPU uploading.
Signed-off-by: Jasber Chen <yipeng.chen at amd.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13306>
---
src/gallium/drivers/radeonsi/si_texture.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index d335128c3ab..35a74509a22 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -1771,7 +1771,7 @@ static void *si_texture_transfer_map(struct pipe_context *ctx, struct pipe_resou
/* Tiled textures need to be converted into a linear texture for CPU
* access. The staging texture is always linear and is placed in GART.
*
- * Always use a staging texture for VRAM, so that we don't map it and
+ * dGPU use a staging texture for VRAM, so that we don't map it and
* don't relocate it to GTT.
*
* Reading from VRAM or GTT WC is slow, always use the staging
@@ -1781,7 +1781,7 @@ static void *si_texture_transfer_map(struct pipe_context *ctx, struct pipe_resou
* is busy.
*/
if (!tex->surface.is_linear || (tex->buffer.flags & RADEON_FLAG_ENCRYPTED) ||
- (tex->buffer.domains & RADEON_DOMAIN_VRAM &&
+ (tex->buffer.domains & RADEON_DOMAIN_VRAM && sctx->screen->info.has_dedicated_vram &&
!sctx->screen->info.smart_access_memory))
use_staging_texture = true;
else if (usage & PIPE_MAP_READ)
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