Mesa (main): radv: add a mask of bound descriptor buffers for dynamic vertex input

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Module: Mesa
Branch: main
Commit: 1b8bdecf6e071759f96cecc5662a3d4592491535
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b8bdecf6e071759f96cecc5662a3d4592491535

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Wed Sep  8 15:10:29 2021 -0400

radv: add a mask of bound descriptor buffers for dynamic vertex input

unnecessarily dereferencing the vertex buffer info array here causes a
ton of cpu overhead due to bad cache locality, so just use a mask to
avoid loading X more cachelines into memory unnecessarily

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13320>

---

 src/amd/vulkan/radv_cmd_buffer.c | 15 +++++++++------
 src/amd/vulkan/radv_private.h    |  1 +
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b6d6c301d0d..9857081fe2c 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -4446,7 +4446,9 @@ radv_CmdBindVertexBuffers2EXT(VkCommandBuffer commandBuffer, uint32_t firstBindi
          const uint32_t bit = 1u << idx;
          if (!buffer) {
             cmd_buffer->state.vbo_misaligned_mask &= ~bit;
+            cmd_buffer->state.vbo_bound_mask &= ~bit;
          } else {
+            cmd_buffer->state.vbo_bound_mask |= bit;
             if (pStrides && vb[idx].stride != stride) {
                if (stride & state->format_align_req_minus_1[idx])
                   cmd_buffer->state.vbo_misaligned_mask |= bit;
@@ -5483,15 +5485,16 @@ radv_CmdSetVertexInputEXT(VkCommandBuffer commandBuffer, uint32_t vertexBindingD
 
       if (chip == GFX6 || chip >= GFX10) {
          struct radv_vertex_binding *vb = cmd_buffer->vertex_bindings;
+         unsigned bit = 1u << loc;
          if (binding->stride & format_align_req_minus_1) {
-            state->misaligned_mask |= 1u << loc;
-            if (vb[attrib->binding].buffer)
-               cmd_buffer->state.vbo_misaligned_mask |= 1u << loc;
+            state->misaligned_mask |= bit;
+            if (cmd_buffer->state.vbo_bound_mask & bit)
+               cmd_buffer->state.vbo_misaligned_mask |= bit;
          } else {
-            state->possibly_misaligned_mask |= 1u << loc;
-            if (vb[attrib->binding].buffer &&
+            state->possibly_misaligned_mask |= bit;
+            if (cmd_buffer->state.vbo_bound_mask & bit &&
                 ((vb[attrib->binding].offset + state->offsets[loc]) & format_align_req_minus_1))
-               cmd_buffer->state.vbo_misaligned_mask |= 1u << loc;
+               cmd_buffer->state.vbo_misaligned_mask |= bit;
          }
       }
 
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 754881aa436..5d852605a45 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1432,6 +1432,7 @@ struct radv_cmd_state {
    uint32_t *emitted_vs_prolog_key;
    uint32_t emitted_vs_prolog_key_hash;
    uint32_t vbo_misaligned_mask;
+   uint32_t vbo_bound_mask;
 };
 
 struct radv_cmd_pool {