Mesa (main): intel/compiler: Set correct cache policy for A64 byte scattered read

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Module: Mesa
Branch: main
Commit: b83c9b21a6a705370c95a98239869be6e71a1239
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b83c9b21a6a705370c95a98239869be6e71a1239

Author: Sagar Ghuge <sagar.ghuge at intel.com>
Date:   Wed Oct 20 10:03:07 2021 -0700

intel/compiler: Set correct cache policy for A64 byte scattered read

This doesn't impact any performance since the previous typo value
matches the current cache control value.

Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13458>

---

 src/intel/compiler/brw_fs.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index c8beeec0f90..c29e82aeb92 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -6283,7 +6283,7 @@ lower_lsc_a64_logical_send(const fs_builder &bld, fs_inst *inst)
                                 lsc_bits_to_data_size(arg),
                                 1 /* num_channels */,
                                 false /* transpose */,
-                                LSC_CACHE_STORE_L1STATE_L3MOCS,
+                                LSC_CACHE_LOAD_L1STATE_L3MOCS,
                                 true /* has_dest */);
       break;
    case SHADER_OPCODE_A64_BYTE_SCATTERED_WRITE_LOGICAL: