Mesa (main): v3dv: refactor TFU jobs
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Fri Oct 22 11:24:28 UTC 2021
Module: Mesa
Branch: main
Commit: ceaf56920c5bdae6ed8807fe69044c0a04f76754
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ceaf56920c5bdae6ed8807fe69044c0a04f76754
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Fri Oct 22 11:29:44 2021 +0200
v3dv: refactor TFU jobs
We had an implementation for image copies and another for buffer to
image copies. Refactor the code so we have a single implementation
of this.
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13481>
---
src/broadcom/vulkan/v3dv_meta_copy.c | 103 +++++++++++++++++++-------------
src/broadcom/vulkan/v3dvx_meta_common.c | 65 +++++++++-----------
src/broadcom/vulkan/v3dvx_private.h | 16 +++--
3 files changed, 100 insertions(+), 84 deletions(-)
diff --git a/src/broadcom/vulkan/v3dv_meta_copy.c b/src/broadcom/vulkan/v3dv_meta_copy.c
index 85cd8e06638..b7c29d08223 100644
--- a/src/broadcom/vulkan/v3dv_meta_copy.c
+++ b/src/broadcom/vulkan/v3dv_meta_copy.c
@@ -850,10 +850,31 @@ copy_image_tfu(struct v3dv_cmd_buffer *cmd_buffer,
const uint32_t base_dst_layer = dst->vk.image_type != VK_IMAGE_TYPE_3D ?
region->dstSubresource.baseArrayLayer : region->dstOffset.z;
for (uint32_t i = 0; i < layer_count; i++) {
- v3dv_X(cmd_buffer->device, meta_emit_tfu_job)
- (cmd_buffer, dst, dst_mip_level, base_dst_layer + i,
- src, src_mip_level, base_src_layer + i,
- width, height, format);
+ const uint32_t dst_offset =
+ dst->mem->bo->offset +
+ v3dv_layer_offset(dst, dst_mip_level, base_dst_layer + i);
+ const uint32_t src_offset =
+ src->mem->bo->offset +
+ v3dv_layer_offset(src, src_mip_level, base_src_layer + i);
+
+ const struct v3d_resource_slice *dst_slice = &dst->slices[dst_mip_level];
+ const struct v3d_resource_slice *src_slice = &src->slices[src_mip_level];
+
+ v3dv_X(cmd_buffer->device, meta_emit_tfu_job)(
+ cmd_buffer,
+ dst->mem->bo->handle,
+ dst_offset,
+ dst_slice->tiling,
+ dst_slice->tiling == V3D_TILING_RASTER ?
+ dst_slice->stride : dst_slice->padded_height,
+ dst->cpp,
+ src->mem->bo->handle,
+ src_offset,
+ src_slice->tiling,
+ src_slice->tiling == V3D_TILING_RASTER ?
+ src_slice->stride : src_slice->padded_height,
+ src->cpp,
+ width, height, format);
}
return true;
@@ -1338,46 +1359,28 @@ copy_buffer_to_image_tfu(struct v3dv_cmd_buffer *cmd_buffer,
else
layer = region->imageOffset.z + i;
- struct drm_v3d_submit_tfu tfu = {
- .ios = (height << 16) | width,
- .bo_handles = {
- dst_bo->handle,
- src_bo->handle != dst_bo->handle ? src_bo->handle : 0
- },
- };
-
const uint32_t buffer_offset =
buffer->mem_offset + region->bufferOffset +
height * buffer_stride * i;
-
const uint32_t src_offset = src_bo->offset + buffer_offset;
- tfu.iia |= src_offset;
- tfu.icfg |= V3D_TFU_ICFG_FORMAT_RASTER << V3D_TFU_ICFG_FORMAT_SHIFT;
- tfu.iis |= width;
const uint32_t dst_offset =
dst_bo->offset + v3dv_layer_offset(image, mip_level, layer);
- tfu.ioa |= dst_offset;
-
- tfu.ioa |= (V3D_TFU_IOA_FORMAT_LINEARTILE +
- (slice->tiling - V3D_TILING_LINEARTILE)) <<
- V3D_TFU_IOA_FORMAT_SHIFT;
- tfu.icfg |= format->tex_type << V3D_TFU_ICFG_TTYPE_SHIFT;
- /* If we're writing level 0 (!IOA_DIMTW), then we need to supply the
- * OPAD field for the destination (how many extra UIF blocks beyond
- * those necessary to cover the height).
- */
- if (slice->tiling == V3D_TILING_UIF_NO_XOR ||
- slice->tiling == V3D_TILING_UIF_XOR) {
- uint32_t uif_block_h = 2 * v3d_utile_height(image->cpp);
- uint32_t implicit_padded_height = align(height, uif_block_h);
- uint32_t icfg =
- (slice->padded_height - implicit_padded_height) / uif_block_h;
- tfu.icfg |= icfg << V3D_TFU_ICFG_OPAD_SHIFT;
- }
-
- v3dv_cmd_buffer_add_tfu_job(cmd_buffer, &tfu);
+ v3dv_X(cmd_buffer->device, meta_emit_tfu_job)(
+ cmd_buffer,
+ dst_bo->handle,
+ dst_offset,
+ slice->tiling,
+ slice->tiling == V3D_TILING_RASTER ?
+ slice->stride : slice->padded_height,
+ image->cpp,
+ src_bo->handle,
+ src_offset,
+ V3D_TILING_RASTER,
+ width,
+ 1,
+ width, height, format);
}
return true;
@@ -2871,10 +2874,30 @@ blit_tfu(struct v3dv_cmd_buffer *cmd_buffer,
dst_mirror_z ? max_dst_layer - i - 1: min_dst_layer + i;
const uint32_t src_layer =
src_mirror_z ? max_src_layer - i - 1: min_src_layer + i;
- v3dv_X(cmd_buffer->device, meta_emit_tfu_job)
- (cmd_buffer, dst, dst_mip_level, dst_layer,
- src, src_mip_level, src_layer,
- dst_width, dst_height, format);
+
+ const uint32_t dst_offset =
+ dst->mem->bo->offset + v3dv_layer_offset(dst, dst_mip_level, dst_layer);
+ const uint32_t src_offset =
+ src->mem->bo->offset + v3dv_layer_offset(src, src_mip_level, src_layer);
+
+ const struct v3d_resource_slice *dst_slice = &dst->slices[dst_mip_level];
+ const struct v3d_resource_slice *src_slice = &src->slices[src_mip_level];
+
+ v3dv_X(cmd_buffer->device, meta_emit_tfu_job)(
+ cmd_buffer,
+ dst->mem->bo->handle,
+ dst_offset,
+ dst_slice->tiling,
+ dst_slice->tiling == V3D_TILING_RASTER ?
+ dst_slice->stride : dst_slice->padded_height,
+ dst->cpp,
+ src->mem->bo->handle,
+ src_offset,
+ src_slice->tiling,
+ src_slice->tiling == V3D_TILING_RASTER ?
+ src_slice->stride : src_slice->padded_height,
+ src->cpp,
+ dst_width, dst_height, format);
}
return true;
diff --git a/src/broadcom/vulkan/v3dvx_meta_common.c b/src/broadcom/vulkan/v3dvx_meta_common.c
index 5c3447dfb51..1dfbbfc57eb 100644
--- a/src/broadcom/vulkan/v3dvx_meta_common.c
+++ b/src/broadcom/vulkan/v3dvx_meta_common.c
@@ -815,62 +815,52 @@ v3dX(meta_emit_copy_image_rcl)(struct v3dv_job *job,
void
v3dX(meta_emit_tfu_job)(struct v3dv_cmd_buffer *cmd_buffer,
- struct v3dv_image *dst,
- uint32_t dst_mip_level,
- uint32_t dst_layer,
- struct v3dv_image *src,
- uint32_t src_mip_level,
- uint32_t src_layer,
+ uint32_t dst_bo_handle,
+ uint32_t dst_offset,
+ enum v3d_tiling_mode dst_tiling,
+ uint32_t dst_padded_height_or_stride,
+ uint32_t dst_cpp,
+ uint32_t src_bo_handle,
+ uint32_t src_offset,
+ enum v3d_tiling_mode src_tiling,
+ uint32_t src_padded_height_or_stride,
+ uint32_t src_cpp,
uint32_t width,
uint32_t height,
const struct v3dv_format *format)
{
- const struct v3d_resource_slice *src_slice = &src->slices[src_mip_level];
- const struct v3d_resource_slice *dst_slice = &dst->slices[dst_mip_level];
-
- assert(dst->mem && dst->mem->bo);
- const struct v3dv_bo *dst_bo = dst->mem->bo;
-
- assert(src->mem && src->mem->bo);
- const struct v3dv_bo *src_bo = src->mem->bo;
-
struct drm_v3d_submit_tfu tfu = {
.ios = (height << 16) | width,
.bo_handles = {
- dst_bo->handle,
- src_bo->handle != dst_bo->handle ? src_bo->handle : 0
+ dst_bo_handle,
+ src_bo_handle != dst_bo_handle ? src_bo_handle : 0
},
};
- const uint32_t src_offset =
- src_bo->offset + v3dv_layer_offset(src, src_mip_level, src_layer);
tfu.iia |= src_offset;
- uint32_t icfg;
- if (src_slice->tiling == V3D_TILING_RASTER) {
- icfg = V3D_TFU_ICFG_FORMAT_RASTER;
+ if (src_tiling == V3D_TILING_RASTER) {
+ tfu.icfg = V3D_TFU_ICFG_FORMAT_RASTER << V3D_TFU_ICFG_FORMAT_SHIFT;
} else {
- icfg = V3D_TFU_ICFG_FORMAT_LINEARTILE +
- (src_slice->tiling - V3D_TILING_LINEARTILE);
+ tfu.icfg = (V3D_TFU_ICFG_FORMAT_LINEARTILE +
+ (src_tiling - V3D_TILING_LINEARTILE)) <<
+ V3D_TFU_ICFG_FORMAT_SHIFT;
}
- tfu.icfg |= icfg << V3D_TFU_ICFG_FORMAT_SHIFT;
+ tfu.icfg |= format->tex_type << V3D_TFU_ICFG_TTYPE_SHIFT;
- const uint32_t dst_offset =
- dst_bo->offset + v3dv_layer_offset(dst, dst_mip_level, dst_layer);
- tfu.ioa |= dst_offset;
+ tfu.ioa = dst_offset;
tfu.ioa |= (V3D_TFU_IOA_FORMAT_LINEARTILE +
- (dst_slice->tiling - V3D_TILING_LINEARTILE)) <<
+ (dst_tiling - V3D_TILING_LINEARTILE)) <<
V3D_TFU_IOA_FORMAT_SHIFT;
- tfu.icfg |= format->tex_type << V3D_TFU_ICFG_TTYPE_SHIFT;
- switch (src_slice->tiling) {
+ switch (src_tiling) {
case V3D_TILING_UIF_NO_XOR:
case V3D_TILING_UIF_XOR:
- tfu.iis |= src_slice->padded_height / (2 * v3d_utile_height(src->cpp));
+ tfu.iis |= src_padded_height_or_stride / (2 * v3d_utile_height(src_cpp));
break;
case V3D_TILING_RASTER:
- tfu.iis |= src_slice->stride / src->cpp;
+ tfu.iis |= src_padded_height_or_stride / src_cpp;
break;
default:
break;
@@ -880,12 +870,11 @@ v3dX(meta_emit_tfu_job)(struct v3dv_cmd_buffer *cmd_buffer,
* OPAD field for the destination (how many extra UIF blocks beyond
* those necessary to cover the height).
*/
- if (dst_slice->tiling == V3D_TILING_UIF_NO_XOR ||
- dst_slice->tiling == V3D_TILING_UIF_XOR) {
- uint32_t uif_block_h = 2 * v3d_utile_height(dst->cpp);
+ if (dst_tiling == V3D_TILING_UIF_NO_XOR || dst_tiling == V3D_TILING_UIF_XOR) {
+ uint32_t uif_block_h = 2 * v3d_utile_height(dst_cpp);
uint32_t implicit_padded_height = align(height, uif_block_h);
- uint32_t icfg =
- (dst_slice->padded_height - implicit_padded_height) / uif_block_h;
+ uint32_t icfg = (dst_padded_height_or_stride - implicit_padded_height) /
+ uif_block_h;
tfu.icfg |= icfg << V3D_TFU_ICFG_OPAD_SHIFT;
}
diff --git a/src/broadcom/vulkan/v3dvx_private.h b/src/broadcom/vulkan/v3dvx_private.h
index ab134225a3a..86add82c062 100644
--- a/src/broadcom/vulkan/v3dvx_private.h
+++ b/src/broadcom/vulkan/v3dvx_private.h
@@ -227,12 +227,16 @@ v3dX(meta_emit_copy_image_rcl)(struct v3dv_job *job,
void
v3dX(meta_emit_tfu_job)(struct v3dv_cmd_buffer *cmd_buffer,
- struct v3dv_image *dst,
- uint32_t dst_mip_level,
- uint32_t dst_layer,
- struct v3dv_image *src,
- uint32_t src_mip_level,
- uint32_t src_layer,
+ uint32_t dst_bo_handle,
+ uint32_t dst_offset,
+ enum v3d_tiling_mode dst_tiling,
+ uint32_t dst_padded_height_or_stride,
+ uint32_t dst_cpp,
+ uint32_t src_bo_handle,
+ uint32_t src_offset,
+ enum v3d_tiling_mode src_tiling,
+ uint32_t src_padded_height_or_stride,
+ uint32_t src_cpp,
uint32_t width,
uint32_t height,
const struct v3dv_format *format);
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