Mesa (main): anv: fix push constant lowering with bindless shaders

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: a6031cd9bd409c793c3a2928eaf9f04f09d2f55a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6031cd9bd409c793c3a2928eaf9f04f09d2f55a

Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Tue Oct 26 14:27:18 2021 +0300

anv: fix push constant lowering with bindless shaders

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 9fa1cdfe7ffd ("intel/rt: Implement push constants as global memory reads")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13529>

---

 src/intel/vulkan/anv_nir_compute_push_layout.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_nir_compute_push_layout.c b/src/intel/vulkan/anv_nir_compute_push_layout.c
index 526e1a48f0b..66b8cd029c1 100644
--- a/src/intel/vulkan/anv_nir_compute_push_layout.c
+++ b/src/intel/vulkan/anv_nir_compute_push_layout.c
@@ -149,12 +149,21 @@ anv_nir_compute_push_layout(const struct anv_physical_device *pdevice,
 
                nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
                switch (intrin->intrinsic) {
-               case nir_intrinsic_load_push_constant:
+               case nir_intrinsic_load_push_constant: {
+                  /* With bindless shaders we load uniforms with SEND
+                   * messages. All the push constants are located after the
+                   * RT_DISPATCH_GLOBALS. We just need to add the offset to
+                   * the address right after RT_DISPATCH_GLOBALS (see
+                   * brw_nir_lower_rt_intrinsics.c).
+                   */
+                  unsigned base_offset =
+                     brw_shader_stage_is_bindless(nir->info.stage) ? 0 : push_start;
                   intrin->intrinsic = nir_intrinsic_load_uniform;
                   nir_intrinsic_set_base(intrin,
                                          nir_intrinsic_base(intrin) -
-                                         push_start);
+                                         base_offset);
                   break;
+               }
 
                case nir_intrinsic_load_desc_set_address_intel: {
                   b->cursor = nir_before_instr(&intrin->instr);