Mesa (main): zink: move ssbo store offset adjustment to compiler passes

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Module: Mesa
Branch: main
Commit: 6d31f4b7b0776e3f97b88007853ae0eb36233933
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d31f4b7b0776e3f97b88007853ae0eb36233933

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Wed Oct 20 10:15:19 2021 -0400

zink: move ssbo store offset adjustment to compiler passes

Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13484>

---

 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 12 ++++--------
 src/gallium/drivers/zink/zink_compiler.c             |  3 +++
 2 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 30f4b6bd267..6a615bdb880 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -2023,8 +2023,6 @@ emit_store_ssbo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
    /* we need to grab 2x32 to fill the 64bit value */
    bool is_64bit = bit_size == 64;
 
-   /* an id of an array member in bytes */
-   SpvId uint_size = emit_uint_const(ctx, 32, MIN2(bit_size, 32) / 8);
    /* we grab a single array member at a time, so it's a pointer to a uint */
    SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
                                                    SpvStorageClassStorageBuffer,
@@ -2046,8 +2044,6 @@ emit_store_ssbo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
     * it may be a const value or it may be dynamic in the shader
     */
    SpvId offset = get_src(ctx, &intr->src[2]);
-   /* calculate byte offset */
-   SpvId vec_offset = emit_binop(ctx, SpvOpUDiv, uint_type, offset, uint_size);
 
    SpvId value = get_src(ctx, &intr->src[0]);
    /* OpAccessChain takes an array of indices that drill into a hierarchy based on the type:
@@ -2071,8 +2067,8 @@ emit_store_ssbo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
             component_split = emit_bitcast(ctx, get_uvec_type(ctx, 32, 2), component);
          for (unsigned j = 0; j < 1 + !!is_64bit; j++) {
             if (j)
-               vec_offset = emit_binop(ctx, SpvOpIAdd, uint_type, vec_offset, one);
-            SpvId indices[] = { member, vec_offset };
+               offset = emit_binop(ctx, SpvOpIAdd, uint_type, offset, one);
+            SpvId indices[] = { member, offset };
             SpvId ptr = spirv_builder_emit_access_chain(&ctx->builder, pointer_type,
                                                          bo, indices,
                                                          ARRAY_SIZE(indices));
@@ -2086,10 +2082,10 @@ emit_store_ssbo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
          write_count++;
       } else if (is_64bit)
          /* we're doing 32bit stores here, so we need to increment correctly here */
-         vec_offset = emit_binop(ctx, SpvOpIAdd, uint_type, vec_offset, one);
+         offset = emit_binop(ctx, SpvOpIAdd, uint_type, offset, one);
 
       /* increment to the next vec4 member index for the next store */
-      vec_offset = emit_binop(ctx, SpvOpIAdd, uint_type, vec_offset, one);
+      offset = emit_binop(ctx, SpvOpIAdd, uint_type, offset, one);
    }
 }
 
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 73443e27933..6f5d4f8f57e 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -689,6 +689,9 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
       }
       break;
    case nir_intrinsic_store_ssbo:
+      b->cursor = nir_before_instr(instr);
+      nir_instr_rewrite_src_ssa(instr, &intr->src[2], nir_udiv_imm(b, intr->src[2].ssa, MIN2(nir_src_bit_size(intr->src[0]), 32) / 8));
+      return true;
    default:
       break;
    }