Mesa (main): radeon/vcn: combine encode params func

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Module: Mesa
Branch: main
Commit: ced5a54c134228c0bd6514fa323037e91d38f1b9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ced5a54c134228c0bd6514fa323037e91d38f1b9

Author: Boyuan Zhang <boyuan.zhang at amd.com>
Date:   Sun Oct 24 18:53:56 2021 -0400

radeon/vcn: combine encode params func

Combine the encode params function for h.264 and hevc to reduce redundancy.

Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
Reviewed-by: Leo Liu <leo.liu at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>

---

 src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 53 +------------------------
 1 file changed, 1 insertion(+), 52 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index faa89911f29..90083037e42 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -1185,56 +1185,6 @@ static void radeon_enc_encode_params(struct radeon_encoder *enc)
    RADEON_ENC_END();
 }
 
-static void radeon_enc_encode_params_hevc(struct radeon_encoder *enc)
-{
-   switch (enc->enc_pic.picture_type) {
-   case PIPE_H2645_ENC_PICTURE_TYPE_I:
-   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
-      enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_I;
-      break;
-   case PIPE_H2645_ENC_PICTURE_TYPE_P:
-      enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_P;
-      break;
-   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
-      enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_P_SKIP;
-      break;
-   case PIPE_H2645_ENC_PICTURE_TYPE_B:
-      enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_B;
-      break;
-   default:
-      enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_I;
-   }
-
-   if (enc->luma->meta_offset) {
-      RVID_ERR("DCC surfaces not supported.\n");
-      return;
-   }
-
-   enc->enc_pic.enc_params.allowed_max_bitstream_size = enc->bs_size;
-   enc->enc_pic.enc_params.input_pic_luma_pitch = enc->luma->u.gfx9.surf_pitch;
-   enc->enc_pic.enc_params.input_pic_chroma_pitch = enc->chroma->u.gfx9.surf_pitch;
-   enc->enc_pic.enc_params.input_pic_swizzle_mode = enc->luma->u.gfx9.swizzle_mode;
-
-   if (enc->enc_pic.enc_params.pic_type == RENCODE_PICTURE_TYPE_I)
-      enc->enc_pic.enc_params.reference_picture_index = 0xFFFFFFFF;
-   else
-      enc->enc_pic.enc_params.reference_picture_index = (enc->enc_pic.frame_num - 1) % 2;
-
-   enc->enc_pic.enc_params.reconstructed_picture_index = enc->enc_pic.frame_num % 2;
-
-   RADEON_ENC_BEGIN(enc->cmd.enc_params);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.pic_type);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.allowed_max_bitstream_size);
-   RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->luma->u.gfx9.surf_offset);
-   RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma->u.gfx9.surf_offset);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_luma_pitch);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_chroma_pitch);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_swizzle_mode);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.reference_picture_index);
-   RADEON_ENC_CS(enc->enc_pic.enc_params.reconstructed_picture_index);
-   RADEON_ENC_END();
-}
-
 static void radeon_enc_encode_params_h264(struct radeon_encoder *enc)
 {
    enc->enc_pic.h264_enc_params.input_picture_structure = RENCODE_H264_PICTURE_STRUCTURE_FRAME;
@@ -1395,6 +1345,7 @@ void radeon_enc_1_2_init(struct radeon_encoder *enc)
    enc->op_init_rc = radeon_enc_op_init_rc;
    enc->op_init_rc_vbv = radeon_enc_op_init_rc_vbv;
    enc->op_preset = radeon_enc_op_speed;
+   enc->encode_params = radeon_enc_encode_params;
 
    if (u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC) {
       enc->session_init = radeon_enc_session_init;
@@ -1404,7 +1355,6 @@ void radeon_enc_1_2_init(struct radeon_encoder *enc)
       enc->nalu_sps = radeon_enc_nalu_sps;
       enc->nalu_pps = radeon_enc_nalu_pps;
       enc->slice_header = radeon_enc_slice_header;
-      enc->encode_params = radeon_enc_encode_params;
       enc->encode_params_codec_spec = radeon_enc_encode_params_h264;
       enc->encode_headers = radeon_enc_headers_h264;
       enc->nalu_prefix = radeon_enc_nalu_prefix;
@@ -1419,7 +1369,6 @@ void radeon_enc_1_2_init(struct radeon_encoder *enc)
       enc->nalu_vps = radeon_enc_nalu_vps;
       enc->nalu_aud = radeon_enc_nalu_aud_hevc;
       enc->slice_header = radeon_enc_slice_header_hevc;
-      enc->encode_params = radeon_enc_encode_params_hevc;
       enc->encode_headers = radeon_enc_headers_hevc;
    }