Mesa (main): radv: only declare dynamic states that are used by internal operations
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Tue Apr 5 08:12:31 UTC 2022
Module: Mesa
Branch: main
Commit: 576833507b9972d6f656317d42025fb2925f6bc8
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=576833507b9972d6f656317d42025fb2925f6bc8
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Fri Apr 1 11:44:26 2022 +0200
radv: only declare dynamic states that are used by internal operations
Initialize some default static PSO states instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15729>
---
src/amd/vulkan/radv_meta_blit.c | 10 ++---
src/amd/vulkan/radv_meta_blit2d.c | 69 ++++++++++++++++++++++-------------
src/amd/vulkan/radv_meta_clear.c | 25 ++++++-------
src/amd/vulkan/radv_meta_resolve_fs.c | 46 ++++++++++++-----------
4 files changed, 86 insertions(+), 64 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_blit.c b/src/amd/vulkan/radv_meta_blit.c
index d2c7c25b1fa..cff75ab7f2a 100644
--- a/src/amd/vulkan/radv_meta_blit.c
+++ b/src/amd/vulkan/radv_meta_blit.c
@@ -735,7 +735,8 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
- .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE},
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
+ .lineWidth = 1.0f},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
@@ -746,13 +747,11 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 4,
+ .dynamicStateCount = 2,
.pDynamicStates =
(VkDynamicState[]){
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
},
},
.flags = 0,
@@ -767,7 +766,8 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
.pAttachments = (VkPipelineColorBlendAttachmentState[]){
{.colorWriteMask = VK_COLOR_COMPONENT_A_BIT | VK_COLOR_COMPONENT_R_BIT |
VK_COLOR_COMPONENT_G_BIT | VK_COLOR_COMPONENT_B_BIT},
- }};
+ },
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f }};
VkPipelineDepthStencilStateCreateInfo depth_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c
index 9b0c418a5f5..9ce05169925 100644
--- a/src/amd/vulkan/radv_meta_blit2d.c
+++ b/src/amd/vulkan/radv_meta_blit2d.c
@@ -700,7 +700,11 @@ blit2d_init_color_pipeline(struct radv_device *device, enum blit2d_src_type src_
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
- .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE},
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
+ .depthBiasConstantFactor = 0.0f,
+ .depthBiasClamp = 0.0f,
+ .depthBiasSlopeFactor = 0.0f,
+ .lineWidth = 1.0f},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
@@ -717,22 +721,16 @@ blit2d_init_color_pipeline(struct radv_device *device, enum blit2d_src_type src_
(VkPipelineColorBlendAttachmentState[]){
{.colorWriteMask = VK_COLOR_COMPONENT_A_BIT | VK_COLOR_COMPONENT_R_BIT |
VK_COLOR_COMPONENT_G_BIT | VK_COLOR_COMPONENT_B_BIT},
- }},
+ },
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f }},
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 9,
+ .dynamicStateCount = 2,
.pDynamicStates =
(VkDynamicState[]){
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_DEPTH_BIAS,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
- VK_DYNAMIC_STATE_DEPTH_BOUNDS,
- VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
- VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
- VK_DYNAMIC_STATE_STENCIL_REFERENCE,
},
},
.flags = 0,
@@ -836,7 +834,11 @@ blit2d_init_depth_only_pipeline(struct radv_device *device, enum blit2d_src_type
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
- .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE},
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
+ .depthBiasConstantFactor = 0.0f,
+ .depthBiasClamp = 0.0f,
+ .depthBiasSlopeFactor = 0.0f,
+ .lineWidth = 1.0f},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
@@ -849,6 +851,7 @@ blit2d_init_depth_only_pipeline(struct radv_device *device, enum blit2d_src_type
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 0,
.pAttachments = NULL,
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f },
},
.pDepthStencilState =
&(VkPipelineDepthStencilStateCreateInfo){
@@ -856,22 +859,35 @@ blit2d_init_depth_only_pipeline(struct radv_device *device, enum blit2d_src_type
.depthTestEnable = true,
.depthWriteEnable = true,
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
+ .front = {
+ .failOp = VK_STENCIL_OP_KEEP,
+ .passOp = VK_STENCIL_OP_KEEP,
+ .depthFailOp = VK_STENCIL_OP_KEEP,
+ .compareOp = VK_COMPARE_OP_NEVER,
+ .compareMask = UINT32_MAX,
+ .writeMask = UINT32_MAX,
+ .reference = 0u,
+ },
+ .back = {
+ .failOp = VK_STENCIL_OP_KEEP,
+ .passOp = VK_STENCIL_OP_KEEP,
+ .depthFailOp = VK_STENCIL_OP_KEEP,
+ .compareOp = VK_COMPARE_OP_NEVER,
+ .compareMask = UINT32_MAX,
+ .writeMask = UINT32_MAX,
+ .reference = 0u,
+ },
+ .minDepthBounds = 0.0f,
+ .maxDepthBounds = 1.0f,
},
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 9,
+ .dynamicStateCount = 2,
.pDynamicStates =
(VkDynamicState[]){
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_DEPTH_BIAS,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
- VK_DYNAMIC_STATE_DEPTH_BOUNDS,
- VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
- VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
- VK_DYNAMIC_STATE_STENCIL_REFERENCE,
},
},
.flags = 0,
@@ -975,7 +991,11 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device, enum blit2d_src_ty
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
- .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE},
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
+ .depthBiasConstantFactor = 0.0f,
+ .depthBiasClamp = 0.0f,
+ .depthBiasSlopeFactor = 0.0f,
+ .lineWidth = 1.0f},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
@@ -988,6 +1008,7 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device, enum blit2d_src_ty
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 0,
.pAttachments = NULL,
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f },
},
.pDepthStencilState =
&(VkPipelineDepthStencilStateCreateInfo){
@@ -1010,19 +1031,17 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device, enum blit2d_src_ty
.writeMask = 0xff,
.reference = 0},
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
+ .minDepthBounds = 0.0f,
+ .maxDepthBounds = 1.0f,
},
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 6,
+ .dynamicStateCount = 2,
.pDynamicStates =
(VkDynamicState[]){
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_DEPTH_BIAS,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
- VK_DYNAMIC_STATE_DEPTH_BOUNDS,
},
},
.flags = 0,
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index dc01a3c179e..d1b3c77d955 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -128,6 +128,10 @@ create_pipeline(struct radv_device *device, uint32_t samples,
.cullMode = VK_CULL_MODE_NONE,
.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
.depthBiasEnable = false,
+ .depthBiasConstantFactor = 0.0f,
+ .depthBiasClamp = 0.0f,
+ .depthBiasSlopeFactor = 0.0f,
+ .lineWidth = 1.0f,
},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
@@ -142,23 +146,12 @@ create_pipeline(struct radv_device *device, uint32_t samples,
.pColorBlendState = cb_state,
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
- /* The meta clear pipeline declares all state as dynamic.
- * As a consequence, vkCmdBindPipeline writes no dynamic state
- * to the cmd buffer. Therefore, at the end of the meta clear,
- * we need only restore dynamic state was vkCmdSet.
- */
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 8,
+ .dynamicStateCount = 3,
.pDynamicStates =
(VkDynamicState[]){
- /* Everything except stencil write mask */
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_DEPTH_BIAS,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
- VK_DYNAMIC_STATE_DEPTH_BOUNDS,
- VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
VK_DYNAMIC_STATE_STENCIL_REFERENCE,
},
},
@@ -203,6 +196,8 @@ create_color_pipeline(struct radv_device *device, uint32_t samples, uint32_t fra
.depthWriteEnable = false,
.depthBoundsTestEnable = false,
.stencilTestEnable = false,
+ .minDepthBounds = 0.0f,
+ .maxDepthBounds = 1.0f,
};
VkPipelineColorBlendAttachmentState blend_attachment_state[MAX_RTS] = {0};
@@ -216,7 +211,8 @@ create_color_pipeline(struct radv_device *device, uint32_t samples, uint32_t fra
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.logicOpEnable = false,
.attachmentCount = MAX_RTS,
- .pAttachments = blend_attachment_state};
+ .pAttachments = blend_attachment_state,
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f }};
VkFormat att_formats[MAX_RTS] = { 0 };
att_formats[frag_output] = format;
@@ -472,6 +468,8 @@ create_depthstencil_pipeline(struct radv_device *device, VkImageAspectFlags aspe
.reference = 0, /* dynamic */
},
.back = {0 /* dont care */},
+ .minDepthBounds = 0.0f,
+ .maxDepthBounds = 1.0f,
};
const VkPipelineColorBlendStateCreateInfo cb_state = {
@@ -479,6 +477,7 @@ create_depthstencil_pipeline(struct radv_device *device, VkImageAspectFlags aspe
.logicOpEnable = false,
.attachmentCount = 0,
.pAttachments = NULL,
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f },
};
const VkPipelineRenderingCreateInfo rendering_create_info = {
diff --git a/src/amd/vulkan/radv_meta_resolve_fs.c b/src/amd/vulkan/radv_meta_resolve_fs.c
index 0df1d66f1c2..4525700ad41 100644
--- a/src/amd/vulkan/radv_meta_resolve_fs.c
+++ b/src/amd/vulkan/radv_meta_resolve_fs.c
@@ -192,7 +192,11 @@ create_resolve_pipeline(struct radv_device *device, int samples_log2, VkFormat f
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
- .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE},
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
+ .depthBiasConstantFactor = 0.0f,
+ .depthBiasClamp = 0.0f,
+ .depthBiasSlopeFactor = 0.0f,
+ .lineWidth = 1.0f},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
@@ -208,22 +212,16 @@ create_resolve_pipeline(struct radv_device *device, int samples_log2, VkFormat f
(VkPipelineColorBlendAttachmentState[]){
{.colorWriteMask = VK_COLOR_COMPONENT_A_BIT | VK_COLOR_COMPONENT_R_BIT |
VK_COLOR_COMPONENT_G_BIT | VK_COLOR_COMPONENT_B_BIT},
- }},
+ },
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f }},
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 9,
+ .dynamicStateCount = 2,
.pDynamicStates =
(VkDynamicState[]){
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_DEPTH_BIAS,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
- VK_DYNAMIC_STATE_DEPTH_BOUNDS,
- VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
- VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
- VK_DYNAMIC_STATE_STENCIL_REFERENCE,
},
},
.flags = 0,
@@ -432,13 +430,21 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, int samples_lo
.passOp = stencil_op,
.depthFailOp = stencil_op,
.compareOp = VK_COMPARE_OP_ALWAYS,
+ .compareMask = UINT32_MAX,
+ .writeMask = UINT32_MAX,
+ .reference = 0u,
},
.back = {
.failOp = stencil_op,
.passOp = stencil_op,
.depthFailOp = stencil_op,
.compareOp = VK_COMPARE_OP_ALWAYS,
- }};
+ .compareMask = UINT32_MAX,
+ .writeMask = UINT32_MAX,
+ .reference = 0u,
+ },
+ .minDepthBounds = 0.0f,
+ .maxDepthBounds = 1.0f};
const VkPipelineVertexInputStateCreateInfo *vi_create_info;
vi_create_info = &normal_vi_create_info;
@@ -474,7 +480,11 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, int samples_lo
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
- .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE},
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
+ .depthBiasConstantFactor = 0.0f,
+ .depthBiasClamp = 0.0f,
+ .depthBiasSlopeFactor = 0.0f,
+ .lineWidth = 1.0f},
.pMultisampleState =
&(VkPipelineMultisampleStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
@@ -490,22 +500,16 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, int samples_lo
(VkPipelineColorBlendAttachmentState[]){
{.colorWriteMask = VK_COLOR_COMPONENT_A_BIT | VK_COLOR_COMPONENT_R_BIT |
VK_COLOR_COMPONENT_G_BIT | VK_COLOR_COMPONENT_B_BIT},
- }},
+ },
+ .blendConstants = { 0.0f, 0.0f, 0.0f, 0.0f }},
.pDynamicState =
&(VkPipelineDynamicStateCreateInfo){
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
- .dynamicStateCount = 9,
+ .dynamicStateCount = 2,
.pDynamicStates =
(VkDynamicState[]){
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
- VK_DYNAMIC_STATE_LINE_WIDTH,
- VK_DYNAMIC_STATE_DEPTH_BIAS,
- VK_DYNAMIC_STATE_BLEND_CONSTANTS,
- VK_DYNAMIC_STATE_DEPTH_BOUNDS,
- VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
- VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
- VK_DYNAMIC_STATE_STENCIL_REFERENCE,
},
},
.flags = 0,
More information about the mesa-commit
mailing list