Mesa (main): iris: Use IRIS_DOMAIN_DEPTH_WRITE for read only depth/stencil.

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Module: Mesa
Branch: main
Commit: 8e0ff0275df6069004f30f9064ee7cb7dabfb553
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e0ff0275df6069004f30f9064ee7cb7dabfb553

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Apr  4 11:04:40 2022 -0700

iris: Use IRIS_DOMAIN_DEPTH_WRITE for read only depth/stencil.

We were using IRIS_DOMAIN_OTHER_READ for read-only depth/stencil access
in an attempt to avoid unnecessary flushing; IRIS_DOMAIN_DEPTH_WRITE
could indicate read-write access.

However, IRIS_DOMAIN_OTHER_READ is clearly the wrong domain.  Depth and
stencil data is read via the depth cache, while IRIS_DOMAIN_OTHER_READ
currently corresponds to the sampler cache and constant cache together
(although this will change in future patches).

It's unclear whether this hack was useful.  For now, just drop it and
use the correct depth cache domain, even if it's marked as read-write.

Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Reviewed-by: Rohan Garg <rohan.garg at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15275>

---

 src/gallium/drivers/iris/iris_state.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 4931bd74037..aaa2f903a83 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -5195,21 +5195,18 @@ pin_depth_and_stencil_buffers(struct iris_batch *batch,
    iris_get_depth_stencil_resources(zsbuf->texture, &zres, &sres);
 
    if (zres) {
-      const enum iris_domain access = cso_zsa->depth_writes_enabled ?
-         IRIS_DOMAIN_DEPTH_WRITE : IRIS_DOMAIN_OTHER_READ;
       iris_use_pinned_bo(batch, zres->bo, cso_zsa->depth_writes_enabled,
-                         access);
+                         IRIS_DOMAIN_DEPTH_WRITE);
       if (zres->aux.bo) {
          iris_use_pinned_bo(batch, zres->aux.bo,
-                            cso_zsa->depth_writes_enabled, access);
+                            cso_zsa->depth_writes_enabled,
+                            IRIS_DOMAIN_DEPTH_WRITE);
       }
    }
 
    if (sres) {
-      const enum iris_domain access = cso_zsa->stencil_writes_enabled ?
-         IRIS_DOMAIN_DEPTH_WRITE : IRIS_DOMAIN_OTHER_READ;
       iris_use_pinned_bo(batch, sres->bo, cso_zsa->stencil_writes_enabled,
-                         access);
+                         IRIS_DOMAIN_DEPTH_WRITE);
    }
 }