Mesa (main): panfrost: Dirty track batch masks

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: dae5e1bccd11bec39bd6c200caad16fa5e749bd5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dae5e1bccd11bec39bd6c200caad16fa5e749bd5

Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date:   Thu Apr 14 16:31:48 2022 -0400

panfrost: Dirty track batch masks

Since 5d187e9cade ("panfrost: Add helpers to set batch masks"), we have common
helpers to set the colour and depth/stencil batch masks. Rather than set the
masks in various Midgard/Bifrost specific paths, set them generically based on
the finer dirty tracking. This lets us share the logic with Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15956>

---

 src/gallium/drivers/panfrost/pan_cmdstream.c | 36 +++++-----------------------
 1 file changed, 6 insertions(+), 30 deletions(-)

diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c
index 65fdfdf7427..f2312d2681b 100644
--- a/src/gallium/drivers/panfrost/pan_cmdstream.c
+++ b/src/gallium/drivers/panfrost/pan_cmdstream.c
@@ -65,9 +65,6 @@ struct panfrost_zsa_state {
         /* Is any depth, stencil, or alpha testing enabled? */
         bool enabled;
 
-        /* Mask of PIPE_CLEAR_{DEPTH,STENCIL} written */
-        unsigned draws;
-
         /* Prepacked words from the RSD */
         struct mali_multisample_misc_packed rsd_depth;
         struct mali_stencil_mask_misc_packed rsd_stencil;
@@ -420,13 +417,6 @@ panfrost_emit_blend(struct panfrost_batch *batch, void *rts, mali_ptr *blend_sha
                 }
 #endif
         }
-
-        for (unsigned i = 0; i < batch->key.nr_cbufs; ++i) {
-                if (!so->info[i].no_colour && batch->key.cbufs[i]) {
-                        batch->draws |= (PIPE_CLEAR_COLOR0 << i);
-                        batch->resolve |= (PIPE_CLEAR_COLOR0 << i);
-                }
-        }
 }
 #endif
 
@@ -670,17 +660,8 @@ panfrost_emit_frag_shader_meta(struct panfrost_batch *batch)
 
 #if PAN_ARCH >= 5
         panfrost_emit_blend(batch, xfer.cpu + pan_size(RENDERER_STATE), blend_shaders);
-#else
-        batch->draws |= PIPE_CLEAR_COLOR0;
-        batch->resolve |= PIPE_CLEAR_COLOR0;
 #endif
 
-        if (ctx->depth_stencil->base.depth_enabled)
-                batch->read |= PIPE_CLEAR_DEPTH;
-
-        if (ctx->depth_stencil->base.stencil[0].enabled)
-                batch->read |= PIPE_CLEAR_STENCIL;
-
         return xfer.gpu;
 }
 #endif
@@ -2971,6 +2952,12 @@ panfrost_update_state_3d(struct panfrost_batch *batch)
 
         if (dirty & PAN_DIRTY_TLS_SIZE)
                 panfrost_batch_adjust_stack_size(batch);
+
+        if (dirty & PAN_DIRTY_BLEND)
+                panfrost_set_batch_masks_blend(batch);
+
+        if (dirty & PAN_DIRTY_ZS)
+                panfrost_set_batch_masks_zs(batch);
 }
 
 #if PAN_ARCH >= 6
@@ -3468,10 +3455,6 @@ panfrost_draw_vbo(struct pipe_context *pipe,
                         return;
         }
 
-        unsigned zs_draws = ctx->depth_stencil->draws;
-        batch->draws |= zs_draws;
-        batch->resolve |= zs_draws;
-
         /* Mark everything dirty when debugging */
         if (unlikely(dev->debug & PAN_DBG_DIRTY))
                 panfrost_dirty_state_all(ctx);
@@ -3772,13 +3755,6 @@ panfrost_create_depth_stencil_state(struct pipe_context *pipe,
         so->enabled = zsa->stencil[0].enabled ||
                 (zsa->depth_enabled && zsa->depth_func != PIPE_FUNC_ALWAYS);
 
-        /* Write masks need tracking together */
-        if (zsa->depth_writemask)
-                so->draws |= PIPE_CLEAR_DEPTH;
-
-        if (zsa->stencil[0].enabled)
-                so->draws |= PIPE_CLEAR_STENCIL;
-
         /* TODO: Bounds test should be easy */
         assert(!zsa->depth_bounds_test);