Mesa (main): zink: use vulkan memory model shader semantics for tcs barriers

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Module: Mesa
Branch: main
Commit: 306b5f37241260d9199ab39b4fe1bf0d31ef5c95
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=306b5f37241260d9199ab39b4fe1bf0d31ef5c95

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Thu Apr 14 14:30:21 2022 -0400

zink: use vulkan memory model shader semantics for tcs barriers

Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15959>

---

 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 17 ++++++++++++++---
 src/gallium/drivers/zink/zink_compiler.c             |  2 ++
 src/gallium/drivers/zink/zink_compiler.h             |  1 +
 3 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 7ed10731abd..08ea553a1c3 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -2945,6 +2945,10 @@ emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
          spirv_builder_emit_control_barrier(&ctx->builder, SpvScopeWorkgroup,
                                             SpvScopeWorkgroup,
                                             SpvMemorySemanticsWorkgroupMemoryMask | SpvMemorySemanticsAcquireReleaseMask);
+      else if (ctx->sinfo->have_vulkan_memory_model)
+         spirv_builder_emit_control_barrier(&ctx->builder, SpvScopeWorkgroup,
+                                            SpvScopeWorkgroup,
+                                            SpvMemorySemanticsOutputMemoryMask | SpvMemorySemanticsAcquireReleaseMask);
       else
          spirv_builder_emit_control_barrier(&ctx->builder, SpvScopeWorkgroup, SpvScopeInvocation, 0);
       break;
@@ -3989,9 +3993,16 @@ nir_to_spirv(struct nir_shader *s, const struct zink_shader_info *sinfo, uint32_
          model = SpvAddressingModelLogical;
       spirv_builder_emit_mem_model(&ctx.builder, model,
                                    SpvMemoryModelGLSL450);
-   } else
-      spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
-                                   SpvMemoryModelGLSL450);
+   } else {
+      if (ctx.stage == MESA_SHADER_TESS_CTRL && ctx.sinfo->have_vulkan_memory_model) {
+         spirv_builder_emit_cap(&ctx.builder, SpvCapabilityVulkanMemoryModel);
+         spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
+                                      SpvMemoryModelVulkan);
+      } else {
+         spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
+                                      SpvMemoryModelGLSL450);
+      }
+   }
 
    if (s->info.stage == MESA_SHADER_FRAGMENT &&
        s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) {
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 1d912504b30..c5ea4a6bbb7 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -2006,6 +2006,8 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
    struct zink_shader *ret = CALLOC_STRUCT(zink_shader);
    bool have_psiz = false;
 
+   ret->sinfo.have_vulkan_memory_model = screen->info.have_KHR_vulkan_memory_model;
+
    ret->hash = _mesa_hash_pointer(ret);
    ret->reduced_prim = get_shader_base_prim_type(nir);
 
diff --git a/src/gallium/drivers/zink/zink_compiler.h b/src/gallium/drivers/zink/zink_compiler.h
index aa7ca91bf4e..3f75eb4c117 100644
--- a/src/gallium/drivers/zink/zink_compiler.h
+++ b/src/gallium/drivers/zink/zink_compiler.h
@@ -59,6 +59,7 @@ struct zink_shader_info {
    bool last_vertex;
    bool have_xfb;
    bool have_sparse;
+   bool have_vulkan_memory_model;
 };