Mesa (main): etnaviv: add support for big tile RS states

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Module: Mesa
Branch: main
Commit: 17d9b0808ab76edb4d2ead0e64a45ef810a13229
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=17d9b0808ab76edb4d2ead0e64a45ef810a13229

Author: Lucas Stach <l.stach at pengutronix.de>
Date:   Sun Apr 10 12:59:34 2022 +0200

etnaviv: add support for big tile RS states

On GPUs with the CACHE128B256BPERLINE feature the RS gained some
new state bits to deal with the new additional information required
for this big tile support.

Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel at pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9255>

---

 src/gallium/drivers/etnaviv/etnaviv_rs.c | 7 +++++++
 src/gallium/drivers/etnaviv/etnaviv_rs.h | 1 +
 2 files changed, 8 insertions(+)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c b/src/gallium/drivers/etnaviv/etnaviv_rs.c
index fe173983c9c..69e610a06b6 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c
@@ -106,6 +106,10 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs,
                           COND(src_super, VIVS_RS_SOURCE_STRIDE_TILING) |
                           COND(src_multi, VIVS_RS_SOURCE_STRIDE_MULTI);
 
+   if (VIV_FEATURE(ctx->screen, chipMinorFeatures6, CACHE128B256BPERLINE))
+      cs->RS_SOURCE_STRIDE |= VIVS_RS_SOURCE_STRIDE_TS_MODE(rs->source_ts_mode) |
+                              COND(src_super, VIVS_RS_SOURCE_STRIDE_SUPER_TILED_NEW);
+
    /* Initially all pipes are set to the base address of the source and
     * destination buffer respectively. This will be overridden below as
     * necessary for the multi-pipe, multi-tiled case.
@@ -126,6 +130,8 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs,
                         COND(dst_super, VIVS_RS_DEST_STRIDE_TILING) |
                         COND(dst_multi, VIVS_RS_DEST_STRIDE_MULTI);
 
+   if (VIV_FEATURE(ctx->screen, chipMinorFeatures6, CACHE128B256BPERLINE))
+      cs->RS_DEST_STRIDE |= COND(dst_super, VIVS_RS_DEST_STRIDE_SUPER_TILED_NEW);
 
    if (src_multi)
       cs->source[1].offset = rs->source_offset + rs->source_stride * rs->source_padded_height / 2;
@@ -768,6 +774,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
       .source_padded_width = src_lev->padded_width,
       .source_padded_height = src_lev->padded_height,
       .source_ts_valid = source_ts_valid,
+      .source_ts_mode = src_lev->ts_mode,
       .source_ts_compressed = src_lev->ts_compress_fmt >= 0,
       .dest_format = format,
       .dest_tiling = dst->layout,
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.h b/src/gallium/drivers/etnaviv/etnaviv_rs.h
index 748de00e16f..5b326d39654 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.h
@@ -34,6 +34,7 @@ struct rs_state {
    uint8_t downsample_x : 1; /* Downsample in x direction */
    uint8_t downsample_y : 1; /* Downsample in y direction */
    uint8_t source_ts_valid : 1;
+   uint8_t source_ts_mode : 1;
    uint8_t source_ts_compressed : 1;
 
    uint8_t source_format; /* RS_FORMAT_XXX */