Mesa (main): panfrost: Fix pack_32_2x16 implementation
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Wed Apr 27 15:43:33 UTC 2022
Module: Mesa
Branch: main
Commit: 76cea8e27b3bb16cf752962ca53da42ab4bf51e4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76cea8e27b3bb16cf752962ca53da42ab4bf51e4
Author: Icecream95 <ixn at disroot.org>
Date: Wed Apr 27 10:31:14 2022 +1200
panfrost: Fix pack_32_2x16 implementation
Fixes: 6f0eff548c1 ("pan/bi: Implement packing ops between 32-bit vec1 and 16-bit vec2")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16181>
---
src/panfrost/bifrost/bifrost_compile.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index 644b75261bb..833fc9715be 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -1982,7 +1982,6 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
* are the exceptions that need to handle swizzles specially. */
switch (instr->op) {
- case nir_op_pack_32_2x16:
case nir_op_vec2:
case nir_op_vec3:
case nir_op_vec4: {
@@ -2047,7 +2046,10 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
return;
}
- case nir_op_mov: {
+ case nir_op_mov:
+ case nir_op_pack_32_2x16: {
+ unsigned src_comps = nir_src_num_components(instr->src[0].src);
+
bi_index idx = bi_src_index(&instr->src[0].src);
bi_index unoffset_srcs[4] = { idx, idx, idx, idx };
@@ -2058,8 +2060,8 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
comps > 3 ? instr->src[0].swizzle[3] : 0,
};
- if (sz == 1) sz = 16;
- bi_make_vec_to(b, dst, unoffset_srcs, channels, comps, sz);
+ if (src_sz == 1) src_sz = 16;
+ bi_make_vec_to(b, dst, unoffset_srcs, channels, src_comps, src_sz);
return;
}
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