Mesa (main): isl,iris: Add I915_FORMAT_MOD_4_TILED support for XeHP

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Module: Mesa
Branch: main
Commit: ac441d0953a9f07ce86f229ea68341405a431dce
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac441d0953a9f07ce86f229ea68341405a431dce

Author: Anuj Phogat <anuj.phogat at gmail.com>
Date:   Mon Jan 13 12:51:55 2020 -0800

isl,iris: Add I915_FORMAT_MOD_4_TILED support for XeHP

This patch adds Tile 4 modifier support to Mesa and allows Mesa to
use Tile 4 on gen12-hp with GBM.

Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Cc: 22.1 <mesa-stable>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14521>

---

 src/gallium/drivers/iris/iris_resource.c | 10 ++++++++++
 src/intel/isl/isl_drm.c                  |  5 +++++
 2 files changed, 15 insertions(+)

diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index ed974a8b021..81d757edcf8 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -62,6 +62,7 @@ enum modifier_priority {
    MODIFIER_PRIORITY_Y_CCS,
    MODIFIER_PRIORITY_Y_GFX12_RC_CCS,
    MODIFIER_PRIORITY_Y_GFX12_RC_CCS_CC,
+   MODIFIER_PRIORITY_4,
 };
 
 static const uint64_t priority_to_modifier[] = {
@@ -72,6 +73,7 @@ static const uint64_t priority_to_modifier[] = {
    [MODIFIER_PRIORITY_Y_CCS] = I915_FORMAT_MOD_Y_TILED_CCS,
    [MODIFIER_PRIORITY_Y_GFX12_RC_CCS] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
    [MODIFIER_PRIORITY_Y_GFX12_RC_CCS_CC] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC,
+   [MODIFIER_PRIORITY_4] = I915_FORMAT_MOD_4_TILED,
 };
 
 static bool
@@ -100,6 +102,10 @@ modifier_is_supported(const struct intel_device_info *devinfo,
       if (devinfo->verx10 != 120)
          return false;
       break;
+   case I915_FORMAT_MOD_4_TILED:
+      if (devinfo->verx10 < 125)
+         return false;
+      break;
    case DRM_FORMAT_MOD_INVALID:
    default:
       return false;
@@ -160,6 +166,9 @@ select_best_modifier(struct intel_device_info *devinfo,
          continue;
 
       switch (modifiers[i]) {
+      case I915_FORMAT_MOD_4_TILED:
+         prio = MAX2(prio, MODIFIER_PRIORITY_4);
+         break;
       case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
          prio = MAX2(prio, MODIFIER_PRIORITY_Y_GFX12_RC_CCS_CC);
          break;
@@ -214,6 +223,7 @@ iris_query_dmabuf_modifiers(struct pipe_screen *pscreen,
    uint64_t all_modifiers[] = {
       DRM_FORMAT_MOD_LINEAR,
       I915_FORMAT_MOD_X_TILED,
+      I915_FORMAT_MOD_4_TILED,
       I915_FORMAT_MOD_Y_TILED,
       I915_FORMAT_MOD_Y_TILED_CCS,
       I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c
index 3237d3e01f8..4e38e0e4bed 100644
--- a/src/intel/isl/isl_drm.c
+++ b/src/intel/isl/isl_drm.c
@@ -121,6 +121,11 @@ isl_drm_modifier_info_list[] = {
       .aux_usage = ISL_AUX_USAGE_GFX12_CCS_E,
       .supports_clear_color = true,
    },
+   {
+      .modifier = I915_FORMAT_MOD_4_TILED,
+      .name = "I915_FORMAT_MOD_4_TILED",
+      .tiling = ISL_TILING_4,
+   },
    {
       .modifier = DRM_FORMAT_MOD_INVALID,
    },