Mesa (main): radeonsi: allocate protected buffer only if required
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Thu Feb 3 09:52:15 UTC 2022
Module: Mesa
Branch: main
Commit: 6f17d8acc96152f19e35a6ab0a227539d38ee734
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f17d8acc96152f19e35a6ab0a227539d38ee734
Author: Shirish S <shirish.s at amd.com>
Date: Mon Jan 31 16:48:37 2022 +0530
radeonsi: allocate protected buffer only if required
protected buffer allocations need to be made if the context is secure
Signed-off-by: Shirish S <shirish.s at amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14848>
---
src/gallium/drivers/radeonsi/si_fence.c | 19 +++++++++++++++++--
src/gallium/drivers/radeonsi/si_gfx_cs.c | 30 ++++++++++++++++++++++++++----
src/gallium/drivers/radeonsi/si_pipe.c | 15 ---------------
3 files changed, 43 insertions(+), 21 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index 9cf879e0b28..e6e4dca082c 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -88,8 +88,23 @@ void si_cp_release_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, unsigne
if (ctx->chip_class == GFX9 && !compute_ib && query_type != PIPE_QUERY_OCCLUSION_COUNTER &&
query_type != PIPE_QUERY_OCCLUSION_PREDICATE &&
query_type != PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE) {
- struct si_resource *scratch = unlikely(ctx->ws->cs_is_secure(&ctx->gfx_cs)) ?
- ctx->eop_bug_scratch_tmz : ctx->eop_bug_scratch;
+ struct si_screen *sscreen = ctx->screen;
+ struct si_resource *scratch;
+
+ if (!ctx->ws->cs_is_secure(&ctx->gfx_cs)) {
+ scratch = ctx->eop_bug_scratch;
+ } else {
+ assert(ctx->screen->info.has_tmz_support);
+ if (!ctx->eop_bug_scratch_tmz)
+ ctx->eop_bug_scratch_tmz =
+ si_aligned_buffer_create(&sscreen->b,
+ PIPE_RESOURCE_FLAG_ENCRYPTED |
+ SI_RESOURCE_FLAG_DRIVER_INTERNAL,
+ PIPE_USAGE_DEFAULT,
+ 16 * sscreen->info.max_render_backends, 256);
+
+ scratch = ctx->eop_bug_scratch_tmz;
+ }
assert(16 * ctx->screen->info.max_render_backends <= scratch->b.b.width0);
radeon_emit(PKT3(PKT3_EVENT_WRITE, 2, 0));
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index ee5c04c6302..3d08d273320 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -594,6 +594,27 @@ void si_emit_surface_sync(struct si_context *sctx, struct radeon_cmdbuf *cs, uns
sctx->context_roll = true;
}
+static struct si_resource* si_get_wait_mem_scratch_bo(struct si_context *ctx, bool is_secure)
+{
+ struct si_screen *sscreen = ctx->screen;
+
+ if (likely(!is_secure)) {
+ return ctx->wait_mem_scratch;
+ } else {
+ assert(sscreen->info.has_tmz_support);
+ if (!ctx->wait_mem_scratch_tmz)
+ ctx->wait_mem_scratch_tmz =
+ si_aligned_buffer_create(&sscreen->b,
+ SI_RESOURCE_FLAG_UNMAPPABLE |
+ SI_RESOURCE_FLAG_DRIVER_INTERNAL |
+ PIPE_RESOURCE_FLAG_ENCRYPTED,
+ PIPE_USAGE_DEFAULT, 8,
+ sscreen->info.tcc_cache_line_size);
+
+ return ctx->wait_mem_scratch_tmz;
+ }
+}
+
void gfx10_emit_cache_flush(struct si_context *ctx, struct radeon_cmdbuf *cs)
{
uint32_t gcr_cntl = 0;
@@ -702,8 +723,8 @@ void gfx10_emit_cache_flush(struct si_context *ctx, struct radeon_cmdbuf *cs)
radeon_end();
if (cb_db_event) {
- struct si_resource* wait_mem_scratch = unlikely(ctx->ws->cs_is_secure(cs)) ?
- ctx->wait_mem_scratch_tmz : ctx->wait_mem_scratch;
+ struct si_resource* wait_mem_scratch =
+ si_get_wait_mem_scratch_bo(ctx, ctx->ws->cs_is_secure(cs));
/* CB/DB flush and invalidate (or possibly just a wait for a
* meta flush) via RELEASE_MEM.
*
@@ -942,8 +963,9 @@ void si_emit_cache_flush(struct si_context *sctx, struct radeon_cmdbuf *cs)
}
/* Do the flush (enqueue the event and wait for it). */
- struct si_resource* wait_mem_scratch = unlikely(sctx->ws->cs_is_secure(cs)) ?
- sctx->wait_mem_scratch_tmz : sctx->wait_mem_scratch;
+ struct si_resource* wait_mem_scratch =
+ si_get_wait_mem_scratch_bo(sctx, sctx->ws->cs_is_secure(cs));
+
va = wait_mem_scratch->gpu_address;
sctx->wait_mem_number++;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 0cf84499073..510b01efa59 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -486,10 +486,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
sctx->eop_bug_scratch = si_aligned_buffer_create(
&sscreen->b, SI_RESOURCE_FLAG_DRIVER_INTERNAL,
PIPE_USAGE_DEFAULT, 16 * sscreen->info.max_render_backends, 256);
- if (sctx->screen->info.has_tmz_support)
- sctx->eop_bug_scratch_tmz = si_aligned_buffer_create(
- &sscreen->b, PIPE_RESOURCE_FLAG_ENCRYPTED | SI_RESOURCE_FLAG_DRIVER_INTERNAL,
- PIPE_USAGE_DEFAULT, 16 * sscreen->info.max_render_backends, 256);
if (!sctx->eop_bug_scratch)
goto fail;
}
@@ -658,17 +654,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
sscreen->info.tcc_cache_line_size);
if (!sctx->wait_mem_scratch)
goto fail;
-
- if (sscreen->info.has_tmz_support) {
- sctx->wait_mem_scratch_tmz =
- si_aligned_buffer_create(screen,
- SI_RESOURCE_FLAG_UNMAPPABLE | SI_RESOURCE_FLAG_DRIVER_INTERNAL |
- PIPE_RESOURCE_FLAG_ENCRYPTED,
- PIPE_USAGE_DEFAULT, 8,
- sscreen->info.tcc_cache_line_size);
- if (!sctx->wait_mem_scratch_tmz)
- goto fail;
- }
}
/* GFX7 cannot unbind a constant buffer (S_BUFFER_LOAD doesn't skip loads
More information about the mesa-commit
mailing list