Mesa (staging/22.0): aco: don't encode src2 for v_writelane_b32_e64

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Module: Mesa
Branch: staging/22.0
Commit: a58a01050c769e846cf1d297cdd1a576e82da062
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a58a01050c769e846cf1d297cdd1a576e82da062

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Wed Feb  2 16:42:24 2022 +0000

aco: don't encode src2 for v_writelane_b32_e64

Encoding src2 doesn't cause issues for print_asm() because we have a
workaround there, but it does for RGP and it seems the developers are not
interested in fixing it.

https://github.com/GPUOpen-Tools/radeon_gpu_profiler/issues/61

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Tested-by: Tatsuyuki Ishi <ishitatsuyuki at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14832>
(cherry picked from commit 0447a2303fb06d6ad1f64e5f079a74bf2cf540da)

---

 .pick_status.json                  | 2 +-
 src/amd/compiler/aco_assembler.cpp | 4 ++++
 src/amd/compiler/aco_print_asm.cpp | 6 ------
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index b97ba0008ec..d37de874152 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -4,7 +4,7 @@
         "description": "aco: don't encode src2 for v_writelane_b32_e64",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp
index 4c404bab7e8..3095f0bda89 100644
--- a/src/amd/compiler/aco_assembler.cpp
+++ b/src/amd/compiler/aco_assembler.cpp
@@ -625,6 +625,10 @@ emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction* inst
          encoding = 0;
          if (instr->opcode == aco_opcode::v_interp_mov_f32) {
             encoding = 0x3 & instr->operands[0].constantValue();
+         } else if (instr->opcode == aco_opcode::v_writelane_b32_e64) {
+            encoding |= instr->operands[0].physReg() << 0;
+            encoding |= instr->operands[1].physReg() << 9;
+            /* Encoding src2 works fine with hardware but breaks some disassemblers. */
          } else {
             for (unsigned i = 0; i < instr->operands.size(); i++)
                encoding |= instr->operands[i].physReg() << (i * 9);
diff --git a/src/amd/compiler/aco_print_asm.cpp b/src/amd/compiler/aco_print_asm.cpp
index a2e88b7a6f7..673f41578b8 100644
--- a/src/amd/compiler/aco_print_asm.cpp
+++ b/src/amd/compiler/aco_print_asm.cpp
@@ -271,12 +271,6 @@ std::pair<bool, size_t>
 disasm_instr(chip_class chip, LLVMDisasmContextRef disasm, uint32_t* binary, unsigned exec_size,
              size_t pos, char* outline, unsigned outline_size)
 {
-   /* mask out src2 on v_writelane_b32 */
-   if (((chip == GFX8 || chip == GFX9) && (binary[pos] & 0xffff8000) == 0xd28a0000) ||
-       (chip >= GFX10 && (binary[pos] & 0xffff8000) == 0xd7610000)) {
-      binary[pos + 1] = binary[pos + 1] & 0xF803FFFF;
-   }
-
    size_t l =
       LLVMDisasmInstruction(disasm, (uint8_t*)&binary[pos], (exec_size - pos) * sizeof(uint32_t),
                             pos * 4, outline, outline_size);