Mesa (staging/22.0): radv: fix R_02881C_PA_CL_VS_OUT_CNTL with mixed cull/clip distances

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Module: Mesa
Branch: staging/22.0
Commit: 59b2c1dddeed061843e783f0514b6913cddd937d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=59b2c1dddeed061843e783f0514b6913cddd937d

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Fri Feb  4 19:02:54 2022 +0000

radv: fix R_02881C_PA_CL_VS_OUT_CNTL with mixed cull/clip distances

Matches radeonsi.

Seems Vulkan CTS doesn't really test cull distances. Removing
VARYING_SLOT_CULL_DIST0/VARYING_SLOT_CULL_DIST1 variables doesn't break
any of dEQP-VK.clipping.*, except for tests which read the variables in
the fragment shader.

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5984
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14882>
(cherry picked from commit 7ddad1b93a131df4c3ec86caf7cacd593caef64f)

---

 .pick_status.json              | 2 +-
 src/amd/vulkan/radv_pipeline.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index d1e6a9bc3dd..44a692a5f6f 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -130,7 +130,7 @@
         "description": "radv: fix R_02881C_PA_CL_VS_OUT_CNTL with mixed cull/clip distances",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a1f5646a5a2..bbeb5cfb88c 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4773,7 +4773,7 @@ radv_pipeline_generate_hw_vs(struct radeon_cmdbuf *ctx_cs, struct radeon_cmdbuf
                              S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(misc_vec_ena) |
                              S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0f) != 0) |
                              S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xf0) != 0) |
-                             cull_dist_mask << 8 | clip_dist_mask);
+                             total_mask << 8 | clip_dist_mask);
 
    if (pipeline->device->physical_device->rad_info.chip_class <= GFX8)
       radeon_set_context_reg(ctx_cs, R_028AB4_VGT_REUSE_OFF, outinfo->writes_viewport_index);
@@ -4911,7 +4911,7 @@ radv_pipeline_generate_hw_ngg(struct radeon_cmdbuf *ctx_cs, struct radeon_cmdbuf
                              S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(misc_vec_ena) |
                              S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0f) != 0) |
                              S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xf0) != 0) |
-                             cull_dist_mask << 8 | clip_dist_mask);
+                             total_mask << 8 | clip_dist_mask);
 
    radeon_set_context_reg(ctx_cs, R_028A84_VGT_PRIMITIVEID_EN,
                           S_028A84_PRIMITIVEID_EN(es_enable_prim_id) |