Mesa (main): iris: Disable PIPE_CAP_PREFER_BACK_BUFFER_REUSE

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 413ea503baea9076dfe8496b139474612d8034bb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=413ea503baea9076dfe8496b139474612d8034bb

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Nov 19 03:50:04 2021 -0800

iris: Disable PIPE_CAP_PREFER_BACK_BUFFER_REUSE

This cap bit only affects DRI_PRIME setups.  Since iris now uses the
blitter to perform dGPU -> iGPU copies asynchronously, it's better to
always use at least two backbuffers so the 3D engine can start rendering
the next frame during the copy.

See commit d17e75285732878bc3ee8307541c1b4f09cbee7c where this change
was made for radeonsi.

Acked-by: Caio Oliveira <caio.oliveira at intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13877>

---

 src/gallium/drivers/iris/iris_screen.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c
index 97318e974c5..3070cbea298 100644
--- a/src/gallium/drivers/iris/iris_screen.c
+++ b/src/gallium/drivers/iris/iris_screen.c
@@ -259,6 +259,8 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_FENCE_SIGNAL:
    case PIPE_CAP_IMAGE_STORE_FORMATTED:
       return true;
+   case PIPE_CAP_PREFER_BACK_BUFFER_REUSE:
+      return false;
    case PIPE_CAP_FBFETCH:
       return BRW_MAX_DRAW_BUFFERS;
    case PIPE_CAP_FBFETCH_COHERENT: